RF Energy Harvesting

Rectennas capture and rectify ambient RF signals (Wi-Fi, cellular, broadcast). The received power follows Friis transmission equation:

where P_t is transmit power, G antenna gains, λ wavelength, and d distance. Practical systems harvest 1-100 µW at 2.4 GHz from distances of 10-100 meters to a 1 W transmitter.

Power Management Considerations

Energy harvesting systems require:

• Impedance matching networks (DC-DC converters for MPPT)
• Ultra-low-power rectifiers (Schottky diodes for RF, synchronous switches for piezoelectric)
• Energy storage elements (thin-film Li-ion, supercapacitors)
• Load scheduling algorithms (duty cycling based on energy availability)

Modern integrated solutions like the BQ25570 achieve cold-start voltages as low as 330 mV with >90% conversion efficiency.

Wired power supplies remain a robust and reliable solution for IoT devices where mobility is not a constraint. Unlike battery-powered or energy-harvesting systems, wired power delivery ensures continuous operation without the need for periodic recharging or replacement. The design considerations for wired power supplies include voltage regulation, efficiency, noise immunity, and cable losses.

Linear vs. Switching Regulators

Two primary approaches dominate wired power supply design: linear regulators and switching regulators. Linear regulators, such as the LM7805, provide a simple, low-noise output but suffer from poor efficiency, especially when the voltage drop between input and output is significant. The power dissipation P_diss in a linear regulator is given by:

Switching regulators, such as buck or boost converters, offer higher efficiency by rapidly switching the input voltage on and off. The efficiency η of an ideal buck converter is:

However, switching regulators introduce high-frequency noise, necessitating careful PCB layout and filtering.

Power Over Ethernet (PoE)

Power over Ethernet (PoE) is a widely adopted wired power solution for IoT devices, particularly in industrial and commercial settings. The IEEE 802.3af/at/bt standards define power delivery up to 90W over Cat5e/Cat6 cables. Key parameters include:

• Voltage range: 44–57V (nominal 48V)
• Power classes: Class 0–8 (802.3bt)
• Maximum current: 600mA (802.3af) to 960mA (802.3bt)

A PoE system consists of a Power Sourcing Equipment (PSE) and a Powered Device (PD). The PD must incorporate a DC-DC converter to step down the 48V to usable levels (e.g., 3.3V or 5V).

PoE Power Budget Calculation

The available power P_avail at the PD depends on the PoE standard and cable resistance R_cable:

where P_PSE is the PSE's maximum output power and I is the current drawn by the PD.

USB Power Delivery (USB-PD)

USB Power Delivery (USB-PD) is another wired power option, particularly for consumer and portable IoT devices. The USB-PD 3.1 specification supports up to 240W (48V, 5A) with programmable power supply (PPS) capability. Key features include:

• Voltage negotiation: 5V, 9V, 15V, 20V, 28V, 36V, 48V
• Bidirectional power flow: Enables charging and discharging scenarios
• Dynamic power management: Adjusts voltage/current in real-time

USB-PD requires a dedicated protocol IC (e.g., STUSB4500, FUSB302B) to handle power contract negotiation.

Voltage Drop and Cable Selection

In long cable runs, voltage drop becomes critical. The voltage drop ΔV across a cable of length L and resistance per unit length R' is:

For example, a 10-meter 24AWG cable (R' ≈ 0.084 Ω/m) carrying 500mA results in a voltage drop of 0.42V. To mitigate this, designers must either:

• Use thicker cables (lower AWG number)
• Increase the supply voltage
• Implement remote sensing at the load

Noise and Transient Protection

Wired power supplies are susceptible to conducted noise and voltage transients. Common mitigation techniques include:

• LC filters: Attenuate high-frequency noise
• TVS diodes: Clamp voltage spikes
• Ferrite beads: Suppress EMI

For industrial environments, IEC 61000-4-5 defines surge immunity requirements, often necessitating multi-stage protection circuits.

Power Management Integrated Circuits (PMICs) in IoT Systems

PMICs are critical components in IoT devices, responsible for efficient power conversion, distribution, and management. Unlike traditional linear regulators, PMICs integrate multiple power rails, voltage scaling, and dynamic power control into a single chip, optimizing energy use in battery-powered or energy-harvesting applications.

Key Functions of PMICs in IoT

• Voltage Regulation: Converts input voltage (e.g., from a battery or energy harvester) to stable levels required by sensors, MCUs, and radios.
• Dynamic Voltage Scaling (DVS): Adjusts supply voltage in real-time based on processing load, reducing power consumption during idle states.
• Power Sequencing: Ensures proper startup/shutdown sequences for multicore processors or mixed-signal systems.
• Battery Management: Implements charging algorithms, fuel gauging, and undervoltage lockout for Li-ion/Po batteries.

Mathematical Analysis of PMIC Efficiency

The efficiency (η) of a PMIC's buck converter is given by:

For a typical IoT scenario with V_in = 3.6V (Li-ion), V_out = 1.8V, and 90% efficiency:

Advanced PMIC Architectures

Modern PMICs employ:

• Hybrid Converters: Combine switched-capacitor and inductive topologies for high efficiency across load ranges.
• Event-Driven Power Gating: Disables unused peripherals via hardware triggers (e.g., interrupt-driven wakeup).
• Adaptive Body Biasing: Dynamically adjusts transistor thresholds to minimize leakage current in sleep modes.

Real-World Implementation Example

The Texas Instruments BQ51050 PMIC demonstrates IoT-specific optimization:

• Input: 4.5-10V (energy harvesting or USB)
• Output: Programmable 3.3V/1.8V with 92% peak efficiency
• Ultra-low quiescent current: 6μA in standby

Challenges in PMIC Design for IoT

Key tradeoffs include:

• Transient response vs. noise sensitivity in RF-heavy designs
• Package size constraints vs. thermal dissipation requirements
• BOM cost vs. feature integration (e.g., onboard LDOs)

Key PMIC Specifications for IoT Applications

Power Management Integrated Circuits (PMICs) are critical in IoT designs due to their ability to efficiently regulate and distribute power across multiple voltage domains. The primary specifications to consider include:

• Input Voltage Range: Must accommodate the power source (e.g., battery, USB, or energy harvester).
• Output Voltage and Current: Must match the requirements of the IoT device's subsystems (MCU, radios, sensors).
• Efficiency (η): Defined as the ratio of output power to input power, typically exceeding 90% for battery-operated devices.
• Quiescent Current (I_Q): The current drawn when the system is in standby mode, crucial for low-power applications.

Topology Considerations

PMICs employ different converter topologies, each with trade-offs:

• Buck Converters: Step-down voltage regulators with high efficiency (up to 95%). Ideal for reducing battery voltage to lower levels.
• Boost Converters: Step-up voltage regulators, useful for energy harvesting or low-voltage batteries.
• Buck-Boost Converters: Provide both step-up and step-down capabilities, suitable for wide input voltage ranges.
• LDOs (Low Dropout Regulators): Offer low noise but lower efficiency, often used for noise-sensitive analog circuits.

Dynamic Power Management

Advanced PMICs support dynamic voltage and frequency scaling (DVFS) to optimize power consumption based on workload. The power savings can be derived from:

where C is the load capacitance, V is the supply voltage, and f is the switching frequency. Reducing V quadratically decreases power consumption.

Case Study: PMIC Selection for a BLE Sensor Node

Consider a Bluetooth Low Energy (BLE) sensor node powered by a 3.7V Li-ion battery:

• Input Range: 2.7V–4.2V (battery discharge range).
• Output Requirements: 1.8V (MCU core), 3.3V (I/O and radio).
• Peak Current: 50mA during RF transmission.

A PMIC with a buck converter for the 1.8V rail and an LDO for the 3.3V rail would balance efficiency and noise performance. The quiescent current should be below 10µA to maximize battery life.

Thermal and Layout Considerations

Power dissipation in PMICs is given by:

Proper PCB layout is essential to minimize parasitic inductance and resistance. Key practices include:

• Short, wide traces for high-current paths.
• Proper grounding and thermal vias under the PMIC package.
• Placement of input/output capacitors close to the PMIC pins.

Efficiency in IoT power supply design is critical due to the constrained energy budgets of battery-operated or energy-harvesting devices. The power conversion efficiency η of a regulator is defined as the ratio of output power P_out to input power P_in:

For switching regulators, efficiency typically ranges between 85% and 95%, whereas linear regulators exhibit efficiencies as low as 30–60% due to their dissipative operation. The power loss P_loss is given by:

Sources of Power Loss

Major contributors to power loss in switching converters include:

• Conduction losses due to finite resistance in MOSFETs, inductors, and PCB traces.
• Switching losses arising from gate charge dissipation and voltage-current overlap during transitions.
• Inductor core losses caused by hysteresis and eddy currents in magnetic materials.
• Quiescent current losses from control circuitry and bias supplies.

Thermal Management

Power dissipation leads to temperature rise, governed by the thermal resistance θ_JA (junction-to-ambient):

where T_J is the junction temperature and T_A is the ambient temperature. To prevent thermal runaway, ensure T_J remains below the maximum rated value (typically 125°C–150°C for silicon devices).

Thermal Design Strategies

• Heat sinking: Use copper pours or dedicated heat sinks to lower θ_JA.
• Layout optimization: Minimize trace resistance and maximize airflow around high-current components.
• Pulse-load handling: For intermittent loads, leverage thermal mass to average dissipation over time.

Case Study: Buck Converter Efficiency

Consider a synchronous buck converter with V_in = 5V, V_out = 3.3V, and I_out = 500mA. Assuming 90% efficiency:

For a TO-252 package with θ_JA = 50°C/W at T_A = 25°C:

This demonstrates acceptable thermal performance, but efficiency drops at light loads due to quiescent current dominance.

Power Consumption in Active vs. Sleep States

IoT devices predominantly operate in low-duty-cycle scenarios, where the majority of power dissipation occurs during brief active periods. The total power consumption P_total can be decomposed into active (P_active) and sleep (P_sleep) components, weighted by their respective time fractions:

where D is the duty cycle (fraction of time spent active). For example, a device with D = 0.1%, P_active = 50 mW, and P_sleep = 10 µW yields:

Sleep Mode Hierarchy

Modern microcontrollers implement multiple sleep states with progressively lower power consumption:

• Idle Mode: CPU halted, peripherals active (~1–5 mA).
• Standby Mode: Only real-time clock (RTC) and wake-up interrupts active (~10–100 µA).
• Deep Sleep: All clocks gated, state retained in SRAM (~1–10 µA).
• Hibernation: Power removed from core, state saved to non-volatile memory (~100 nA).

Duty Cycle Optimization

Minimizing P_total requires optimizing both D and the wake-up energy overhead E_wake. The latter includes:

For a device waking every T seconds to transmit data for t_active, the optimal T balances latency and energy:

where R_data is the data rate requirement.

Practical Implementation

In ESP32-based designs, for instance, the following steps reduce wake-up overhead:

• Use ULP coprocessor for sensor polling during deep sleep.
• Batch data transmissions to minimize radio activations.
• Leverage clock gating to disable unused peripherals.

Case Study: LoRaWAN Node

A LoRaWAN device with t_active = 1 s, T = 300 s, and E_wake = 5 mJ achieves:

This results in a 10-year battery life for a 1200 mAh coin cell.

Fundamentals of DVFS

Dynamic Voltage and Frequency Scaling (DVFS) is a power management technique that adjusts a processor's operating voltage (V_dd) and clock frequency (f_clk) dynamically to optimize energy efficiency. The power dissipation of a CMOS-based processor follows:

where C_eff is the effective switching capacitance, and I_leak is the leakage current. Reducing V_dd quadratically lowers dynamic power, while frequency scaling provides linear power reduction.

Voltage-Frequency Coupling

The maximum operating frequency of a CMOS circuit is constrained by the supply voltage due to gate delay (τ_d):

where V_th is the threshold voltage and α (typically 1.3–2) accounts for velocity saturation. This necessitates coordinated voltage-frequency adjustments to maintain timing margins.

Implementation in IoT Processors

Modern IoT SoCs (e.g., ARM Cortex-M series) implement DVFS through:

• Voltage islands: Independent power domains for cores/peripherals
• Clock domain crossing: Synchronization logic for frequency transitions
• Adaptive body biasing: V_th adjustment to mitigate leakage at low voltages

Control Algorithms

DVFS controllers use workload predictors to select optimal (V_dd, f_clk) pairs. A common approach is the criticality monitor algorithm:

where e(t) is the difference between actual and target instruction throughput, and K_p, K_i are PID coefficients tuned for the processor's thermal envelope.

Practical Considerations

Key challenges in IoT DVFS implementations include:

• Transition overhead: Energy penalty during voltage/frequency switching (typically 10–100 µs)
• Stability constraints: Minimum voltage for SRAM retention (∼0.7V for 40nm processes)
• PMIC latency: Response time of power management ICs (∼50 µs for I²C-controlled regulators)

Case Study: ESP32 Power Modes

The ESP32 microcontroller demonstrates three DVFS operating points:

Transitions between modes occur through hardware-automated sequences that first reduce frequency, then voltage (during scaling down), or vice versa (during scaling up) to prevent timing violations.

Energy-Delay Tradeoffs

The optimal DVFS operating point minimizes the energy-delay product (EDP):

where E_sw is the switching energy per transition and N_cycles is the total clock cycles required for computation. For IoT workloads with bursty traffic patterns, EDP-optimal points typically operate at 30–60% of maximum frequency.

Power gating is an essential technique in IoT devices to minimize leakage current and extend battery life by selectively shutting down unused peripherals. Unlike traditional power domains that remain always-on, power-gated peripherals are completely isolated from the supply rail when inactive, reducing static power dissipation to near-zero levels.

MOSFET-Based Power Switching

The most common implementation uses low-R_DS(on) MOSFETs as power switches. The total voltage drop across the switch must be minimized to maintain peripheral functionality:

For a typical IoT sensor drawing 10mA through a 100mΩ MOSFET, this results in just 1mV drop. However, inrush current during activation requires careful consideration:

where C_load represents the total decoupling capacitance of the peripheral. A 10μF load with 1ms rise time would generate 100mA inrush current at 3.3V.

Sequencing and Timing Constraints

Proper power sequencing prevents latch-up conditions in CMOS peripherals. The following constraints must be satisfied:

• IO voltages must not exceed supply voltage by more than 0.3V
• Core voltage must stabilize before I/O buffers activate
• Reset must remain asserted until supply reaches 90% of nominal

Modern PMICs implement programmable sequencing delays with 1% accuracy, typically ranging from 1μs to 100ms. The delay τ between enabling power and releasing reset can be calculated as:

Leakage Current Analysis

In deep sleep modes, leakage current becomes the dominant power loss mechanism. The total leakage I_leak through a power-gated block follows:

where N_gates is the transistor count, I_{gate_leak} is per-gate leakage (typically 1-10pA at 25°C), A_diff is junction area, and J_junction is reverse-bias current density (~1nA/μm²).

Implementation Case Study

A BLE SoC implementing aggressive power gating achieved the following measured results:

The wake time penalty must be balanced against energy savings, particularly for frequently-accessed peripherals. An optimal gating strategy minimizes the product of wake energy and wake frequency:

Regulatory Frameworks and Key Standards

Designing an IoT power supply requires adherence to multiple international standards to ensure safety, electromagnetic compatibility (EMC), and energy efficiency. The most critical regulatory frameworks include:

• IEC 62368-1 - Safety standard for audio/video, information, and communication technology equipment.
• IEC 61000-4-x series - EMC immunity and emissions standards.
• EN 300 328 - Covers radio spectrum usage for 2.4 GHz ISM band devices.
• UL 60730 - Safety requirements for automatic electrical controls.
• IEEE 802.3af/at/bt - Power over Ethernet (PoE) standards.

Safety Considerations and Isolation Requirements

For AC-DC power supplies, reinforced or double insulation is typically required between primary and secondary circuits. The creepage and clearance distances can be calculated using:

where k is a material-dependent constant (typically 0.5-1.0 mm/kV^1/2) and V_peak is the working voltage. For example, a 230VAC supply requires at least 3.2mm creepage distance for basic insulation.

EMC Design Challenges

IoT devices must comply with conducted and radiated emissions limits. The maximum allowable conducted emissions (CISPR 32 Class B) are:

Common mitigation techniques include:

• Proper PCB layout with ground planes
• X/Y capacitors for differential mode filtering
• Common-mode chokes for high-frequency noise suppression

Energy Efficiency Requirements

The EU Ecodesign Directive (2019/1782) mandates minimum efficiency levels for external power supplies:

Wireless Power Transfer Standards

For inductive charging applications, the Qi standard (WPC 1.3) specifies:

• Operating frequency: 87-205 kHz
• Maximum power: 15W (Baseline Power Profile)
• Efficiency requirement: >70% at 5W output

The foreign object detection (FOD) system must be able to detect metallic objects as small as 0.2g with 90% probability.

Environmental Compliance

RoHS 3 (Directive 2015/863) restricts the use of 10 hazardous substances, including lead and mercury. The maximum allowable concentrations are:

For outdoor IoT devices, IP ratings define protection levels. An IP67-rated enclosure must withstand immersion in 1m of water for 30 minutes.

Fundamentals of Voltage and Current Transients

Overvoltage and overcurrent events in IoT systems arise from electrostatic discharge (ESD), inductive load switching, lightning-induced surges, or faulty power supply conditions. The transient voltage V_transient can be modeled as an exponential decay:

where V_peak is the peak transient voltage, t is time, and τ is the time constant determined by the system's parasitic capacitance and resistance.

Protection Circuit Topologies

Two primary protection strategies are employed:

• Clamping (e.g., TVS diodes, Zener diodes) limits voltage to a safe level by diverting excess current.
• Current Limiting (e.g., PTC fuses, electronic circuit breakers) interrupts or restricts current flow during faults.

TVS Diode Selection

The standoff voltage V_WM of a transient voltage suppressor (TVS) diode must exceed the normal operating voltage but remain below the maximum tolerable voltage of the protected IC. The clamping voltage V_C is derived from:

where I_PP is the peak pulse current and R_D is the dynamic resistance of the diode.

Foldback Current Limiting

Foldback circuits reduce current under short-circuit conditions to minimize power dissipation. The foldback characteristic is defined by:

where R_s is the sense resistor, and R₁/R₂ set the foldback ratio.

Practical Implementation Challenges

Parasitic inductance in PCB traces can degrade high-frequency transient response. For a trace of length l and inductance per unit length L', the inductive voltage drop during a transient is:

This necessitates placing protection devices as close as possible to vulnerable ICs.

Case Study: LoRa Node Protection

A 3.3V LoRa module with 15kV ESD susceptibility requires:

• Bidirectional TVS diode with V_WM = 3.3V and V_C < 5.5V
• Polymer PTC fuse with hold current > 100mA (typical operating current) and trip current < 300mA
• 10Ω series resistor to limit inrush current during hot-plug events

Electromagnetic compatibility (EMC) is critical in IoT power supply design due to the susceptibility of low-power circuits to conducted and radiated interference. Noise mitigation strategies must address both emissions and immunity, ensuring reliable operation in electrically noisy environments.

Conducted Emissions and Filtering

Switching power supplies generate high-frequency harmonics that propagate through power and ground traces. A second-order LC filter attenuates these emissions, with the cutoff frequency determined by:

where L is the filter inductance and C is the capacitance. For effective suppression, the cutoff frequency should be at least one decade below the switching frequency. Common-mode chokes with high impedance at the noise frequency range are essential for attenuating differential-to-common-mode conversion.

Radiated Emissions and Shielding

High di/dt loops in switching regulators act as small loop antennas, emitting magnetic fields proportional to:

where A is the loop area and r is the distance from the source. Minimizing loop area through proper component placement and using multilayer PCBs with dedicated ground planes reduces radiation. Ferrite beads placed on supply lines provide additional high-frequency attenuation.

Grounding Strategies

Mixed-signal systems require careful partitioning of analog and digital grounds to prevent noise coupling. A star grounding topology with a single connection point between ground domains minimizes ground loops. For high-frequency circuits, a solid ground plane with low inductance provides a return path for switching currents.

Decoupling Techniques

Local energy storage near ICs suppresses high-frequency transients. The total decoupling capacitance required is given by:

where I_peak is the maximum current transient, Δt is the transition time, and ΔV is the allowable voltage droop. A combination of bulk (10-100μF), ceramic (0.1μF), and high-frequency (1-10nF) capacitors provides effective broadband decoupling.

Transient Protection

Voltage spikes from inductive loads or electrostatic discharge (ESD) require TVS diodes with clamping voltage below the IC's maximum rating. The energy absorption capability must satisfy:

where C_stray is the parasitic capacitance and V_ESD is the discharge voltage. For IEC 61000-4-2 compliance, TVS diodes should withstand at least 8kV contact discharge.

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• 3 Terms, definitions and abbreviated terms - ISO — The needs of data centres also vary in terms of availability of service, the provision of security and the objectives for energy efficiency. These needs and objectives influence the design of data centres in terms of building construction, power distribution, environmental control, telecommunications cabling and physical security.