LTspice Simulation

1. Overview of LTspice and Its Capabilities

1.1 Overview of LTspice and Its Capabilities

LTspice, developed by Linear Technology (now part of Analog Devices), is a high-performance SPICE simulator widely used for analog circuit design and analysis. Unlike generic SPICE implementations, LTspice integrates proprietary enhancements for speed and convergence, making it particularly effective for switching regulator simulations and nonlinear circuit analysis.

Core Simulation Features

The software supports:

Mathematical Engine Enhancements

LTspice's solver implements modified nodal analysis with these optimizations:

$$ \mathbf{Gx} = \mathbf{w} $$

where G is the conductance matrix incorporating:

Advanced Modeling Capabilities

The software includes:

Practical Implementation Considerations

For power electronics simulations, LTspice demonstrates particular advantages:

$$ t_{resolution} = \frac{1}{10f_{sw}} $$

where fsw is the switching frequency. The solver automatically adjusts internal timesteps below this threshold during switching events.

Extended Device Support

Beyond standard SPICE models, LTspice provides:

Installing and Setting Up LTspice

LTspice, developed by Analog Devices (formerly Linear Technology), is a high-performance SPICE simulator widely used for circuit design, analysis, and optimization. Unlike generic SPICE tools, LTspice integrates proprietary models for Linear Technology/Analog Devices components, enabling faster convergence and higher accuracy in simulations.

System Requirements

LTspice is lightweight and runs efficiently on modern systems. The minimum requirements include:

Installation Procedure

Download the latest version from the Analog Devices website. The installer includes:

Run the installer with administrative privileges. For advanced users, the following command-line switches are available:

LTspice_64bit.exe /S /V"/qn"

Post-Installation Configuration

After installation, configure the following for optimal performance:

1. Directory Structure

LTspice stores files in these default locations:

2. Simulation Settings

Access Control PanelOperation to adjust:

3. Third-Party Model Integration

To add custom SPICE models (e.g., Infineon MOSFETs):

  1. Place .lib or .sub files in the lib\sub directory.
  2. Include the model in your schematic using .include model.lib.

Advanced Setup: Command-Line Operation

LTspice supports batch mode for automated testing:

"C:\Program Files\LTC\LTspiceXVII\XVIIx64.exe" -b -Run "C:\sim\test.asc"

Key flags:

Navigating the LTspice Interface

Main Components of the LTspice GUI

The LTspice interface consists of several key components, each serving a distinct function in circuit simulation and analysis. The primary elements include:

Schematic Editor Workflow

Circuit construction follows a hierarchical flow:

  1. Place components via F2 (component menu) or toolbar icons
  2. Wire connections using F3 or right-click drag
  3. Assign component values by right-clicking on symbols
  4. Set simulation parameters through Simulate > Edit Simulation Cmd

Advanced Navigation Shortcuts

Power users should memorize these efficiency boosters:

Shortcut Function
Ctrl+R Rotate component during placement
Ctrl+E Mirror component
Alt+LeftClick Probe node voltage
Ctrl+LeftClick Measure current through component

Customizing the Workspace

Tailor the environment via Tools > Control Panel:

$$ \text{RELTOL} = 10^{-3} \quad \text{(Default 0.1% relative error tolerance)} $$

Netlist Generation View

Access the underlying SPICE netlist via View > SPICE Netlist. This reveals:

Waveform Viewer Tools

The post-processing toolkit includes:

$$ \text{THD} = \sqrt{\sum_{n=2}^{\infty} \left( \frac{V_n}{V_1} \right)^2 } \quad \text{(Calculated via FFT)} $$
LTspice Interface Layout A labeled diagram showing the spatial arrangement of LTspice's main GUI components, including the schematic editor, toolbar, component library, waveform viewer, and status bar. Toolbar (Run/Stop/Zoom) Component Library (F2) Schematic Editor Waveform Viewer Status Bar
Diagram Description: A labeled diagram would physically show the spatial arrangement of LTspice's main GUI components (schematic editor, toolbar, library, waveform viewer) and their relative positions.

2. Creating a Simple Circuit Schematic

Creating a Simple Circuit Schematic

To construct a basic circuit in LTspice, begin by launching the software and selecting File → New Schematic. The workspace consists of a blank canvas where components are placed and interconnected. The primary components for a simple DC circuit include a voltage source, resistor, and ground reference.

Placing Components

Use the Component toolbar or press F2 to open the component selection menu. Key components are categorized as follows:

Wiring the Circuit

Press F3 to enter wiring mode. Click to start a wire from a component terminal and drag to the destination. Ensure all nodes are connected; unconnected wires appear red. For a series circuit:

  1. Connect the positive terminal of the voltage source to one end of the resistor.
  2. Link the other resistor terminal to ground.
$$ V = IR $$

Setting Simulation Parameters

Navigate to Simulate → Edit Simulation Cmd to configure analysis. For DC operating point analysis:

Running the Simulation

Press the Run button (▶) or hit F6. Probe the circuit by clicking nodes to view voltages or components for currents. For the resistor network:

$$ I = \frac{V_{\text{source}}}{R} $$

Debugging Common Issues

If the simulation fails:

For nonlinear circuits, enable Gmin stepping in the simulation settings to aid convergence.

2.2 Setting Up Simulation Parameters

DC Operating Point Analysis

To configure a DC operating point simulation (.op), LTspice solves the nonlinear system equations at a fixed bias point. The solver iteratively computes node voltages and branch currents using modified nodal analysis (MNA), terminating when the error norm satisfies:

$$ \|\mathbf{F}(\mathbf{x})\|_2 < \epsilon_{\text{rel}} \|\mathbf{x}\|_2 + \epsilon_{\text{abs}} $$

where εrel defaults to 1e-4 and εabs to 1e-12. For convergence-critical circuits, adjust these via:

.options reltol=1e-6 abstol=1e-15

Transient Analysis Configuration

Transient simulations (.tran) require:

For a 100kHz buck converter with 10ns rise time:

.tran 0 100u 0 1n startup

AC Small-Signal Analysis

AC analysis (.ac) linearizes the circuit around the DC operating point. Key parameters:

$$ \text{Points/decade} = \frac{\log(f_{\text{stop}}/f_{\text{start}})}{\log(10)} \times N $$

For 1Hz-1MHz with 100 points/decade:

.ac dec 100 1 1Meg

Solver Options for Stiff Systems

For circuits with widely separated time constants (e.g., PLLs), enable alternate solver methods:

.options method=gear
.options maxstep=10p

The Gear method provides better stability for stiff differential equations at the cost of increased computational complexity.

Monte Carlo and Worst-Case Analysis

Statistical simulations require parameter sweeps with distribution definitions:

.step param R1 list 1k 1.1k 0.9k
.step param C1 mc(uniform,0.1) 10n

Combine with .measure directives to quantify performance variations.

2.3 Running and Analyzing Simulation Results

Executing Simulations

After constructing the circuit schematic, initiate the simulation by pressing the Run button or using the hotkey F8. LTspice solves the circuit using Modified Nodal Analysis (MNA), formulating the system as:

$$ Gx = b $$

where G is the conductance matrix, x the unknown node voltages/branch currents, and b the independent sources vector. For transient analysis, numerical integration methods like Gear or trapezoidal rule discretize time-domain equations.

Probing Signals

Click any node or component terminal to plot voltages/currents. For differential measurements, Alt+click creates a floating probe. Currents through components are visualized by placing an inductor voltage probe (with 0H inductance) in series.

R1 V(probe)

Waveform Viewer Operations

Advanced Analysis Techniques

Frequency-Domain Metrics

For AC simulations, right-click the waveform viewer and select View > FFT to compute Fast Fourier Transforms. The power spectral density (PSD) is calculated as:

$$ PSD(f) = \frac{1}{N \cdot f_s} \left| \sum_{n=0}^{N-1} x[n] e^{-j2\pi fn/f_s} \right|^2 $$

Parameter Sweeps

Use .step directives to analyze circuit behavior across component variations. For Monte Carlo analysis with Gaussian distributions:

.step param R1 list 1k 2.2k 4.7k
.step param C1 10n 100n 10n
.mc 1000 V(out) GAUSS(0.1 0.01)

Exporting Data

Right-click waveforms > File > Export to save data as:

Convergence Troubleshooting

For failed simulations, adjust solver settings under Control Panel > SPICE:

LTspice Signal Probing and Waveform Navigation Diagram showing LTspice circuit schematic with probe points and corresponding waveform viewer with zoom and cursor measurement tools. Circuit Schematic R1 C1 Q1 V(probe1) V(probe2) Alt+click to probe Waveform Viewer Time Voltage zoom region ΔT ΔV
Diagram Description: The section includes visual concepts like probing signals and waveform viewer operations that would benefit from a labeled diagram showing the LTspice interface with probe locations and zoom/cursor actions.

3. Using SPICE Directives and Commands

Using SPICE Directives and Commands

SPICE Directives: Syntax and Functionality

SPICE directives in LTspice are text-based commands that modify simulation behavior, define parameters, or control analysis modes. Unlike GUI-based settings, directives offer fine-grained control through the SPICE netlist. Common directives include:

Directives are added via the SPICE Directive text box (Ctrl+T) or directly in the netlist. For example:

.tran 10n 1m 0 10n ; Transient analysis: 10ns step, 1ms stop, 0 initial delay, 10ns max step

Mathematical Expressions in Directives

SPICE supports algebraic expressions using operators (+ - * / ^) and functions (sin(), log(), sqrt()). For instance, a parametric sweep with a logarithmic scale:

.param freq=10k
.ac dec 100 {freq} {freq*10} ; Decade sweep from 10kHz to 100kHz

Conditional Execution and Loops

Advanced users leverage .if/.else/.endif and .step for conditional simulations. A Monte Carlo analysis with Gaussian-distributed tolerances:

.param Rnom=1k tol=0.1
.step param run 1 10 1 ; 10 runs
.param Rval={Rnom*(1+gauss(tol))}
R1 N001 0 {Rval}

Measurement Scripts with .meas

The .meas directive extracts quantitative results (e.g., bandwidth, phase margin). For a second-order filter:

.ac dec 100 1 1Meg
.meas AC BW TRIG V(out)=0.707 MAX V(out) ; Bandwidth at -3dB

Netlist Integration

Directives can be embedded directly in the netlist for batch processing or legacy SPICE compatibility. Example netlist snippet:

V1 in 0 SINE(0 1 1k)
R1 in out 1k
C1 out 0 1u
.ac dec 10 100 100k
.end

Practical Considerations

For large-scale designs, hierarchical blocks (.subckt) with parameterized values improve modularity. A subcircuit for an op-amp model:

.subckt OPAMP V+ V- Vout
G1 Vout 0 V+ V- 1e6
.ends

Parametric and Monte Carlo Analysis

Parametric Analysis in LTspice

Parametric analysis allows sweeping a component parameter or variable across a range of values to observe its effect on circuit behavior. In LTspice, this is implemented using the .step directive. The general syntax is:

.step param X START STOP STEP

Where X is the parameter being swept (e.g., resistance, voltage, or a user-defined variable), and START, STOP, and STEP define the range and resolution. For example, to analyze a resistor's impact on gain:

.step param Rload 1k 10k 1k

This sweeps Rload from 1kΩ to 10kΩ in 1kΩ increments. Results are plotted as overlapping traces, enabling direct comparison of parameter influence.

Monte Carlo Analysis

Monte Carlo analysis evaluates circuit performance under component tolerances by running multiple simulations with randomized parameter values. LTspice implements this using:

.step param run 1 1000 1

Combined with the mc() function to introduce Gaussian-distributed variations. For a resistor with 5% tolerance:

R1 N001 N002 {mc(10k, 0.05)}

Here, mc(10k, 0.05) varies the nominal 10kΩ value by ±5% (3σ) across iterations. Statistical results are aggregated to predict yield or failure rates.

Mathematical Foundation

Monte Carlo relies on pseudo-random sampling. For a Gaussian distribution, the probability density function (PDF) is:

$$ f(x) = \frac{1}{\sigma\sqrt{2\pi}} e^{-\frac{(x-\mu)^2}{2\sigma^2}} $$

Where μ is the mean (nominal value) and σ the standard deviation (tolerance/3). LTspice uses the Box-Muller transform to generate these values.

Practical Applications

For advanced users, combining both techniques—e.g., stepping temperature while running Monte Carlo—provides robustness validation under real-world conditions.

Frequency and Noise Analysis

AC Analysis Fundamentals

Frequency-domain analysis in LTspice employs small-signal linearization around a DC operating point. The .AC directive performs a logarithmic or linear sweep across a user-defined range, computing the transfer function:

$$ H(f) = \frac{V_{out}(f)}{V_{in}(f)} $$

Where H(f) is the complex frequency response. The simulation first solves the DC bias point, then linearizes nonlinear components (e.g., transistors) using their small-signal models. For a MOSFET, this involves calculating:

$$ g_m = \left. \frac{\partial I_D}{\partial V_{GS}} \right|_{Q-point} $$

Noise Analysis Implementation

LTspice's .NOISE analysis computes contributions from thermal, shot, and flicker noise sources. The total output-referred noise spectral density is derived by summing individual component contributions:

$$ S_{total}(f) = \sum_{i=1}^N |H_i(f)|^2 \cdot S_i(f) $$

Where Hi(f) is the transfer function from noise source i to the output, and Si(f) is the source's PSD. For resistors, thermal noise follows:

$$ S_R(f) = 4kTR $$

Practical Configuration Steps

  1. Define the AC source amplitude (typically 1V for normalized analysis)
  2. Set sweep parameters: Octave/Decade/Linear, points per decade (e.g., 100), frequency range
  3. Specify output nodes for noise analysis using .NOISE V(out) Vsrc dec 100 1Hz 100MHz
0 dB Frequency (Hz)

Interpreting Results

Key metrics include:


* Example Noise Analysis Setup
V1 in 0 AC 1
R1 in out 1k
C1 out 0 1u
.ac dec 10 1 1G
.noise V(out) V1 dec 10 1 1G
   

Advanced Techniques

For oscillator phase noise analysis:

  1. Run transient analysis to establish steady-state oscillation
  2. Use .STEP param to inject frequency perturbations
  3. Extract phase deviation via Hilbert transform in post-processing
Bode Plot and Noise Spectral Density A dual-plot diagram showing Bode magnitude/phase response (top) and noise spectral density (bottom) with logarithmic frequency axis. 10 100 1k 10k Frequency (Hz) 20 0 -20 -40 |H(f)| (dB) 180 90 0 -90 Phase (deg) 0 1n 10n 100n S(f) (V²/Hz) -3dB Unity gain
Diagram Description: The section discusses frequency response and noise analysis, which are inherently visual concepts best represented with Bode plots and noise spectral density curves.

4. Adding and Customizing Component Models

Adding and Customizing Component Models

Importing Third-Party SPICE Models

LTspice supports the integration of third-party SPICE models, including vendor-provided .lib, .mod, or .sub files. To import a model:

* Example: Importing a MOSFET model
.lib C:\LTspice\lib\sub\BSIM4.lib
M1 D G S B NMOS W=1u L=0.1u

Editing Existing Component Parameters

Double-click any component to modify its attributes. For semiconductor devices, key parameters include:

Creating Custom Symbol-File Associations

To map a custom symbol to a SPICE model:

  1. Design the symbol using LTspice’s symbol editor (Tools > Symbol Editor).
  2. Define pin mappings to match the model’s netlist order.
  3. Save the symbol as .asy and place it in /lib/sym/Custom.

Nonlinear Behavioral Modeling

For components without predefined models, use behavioral sources (B directive) with arbitrary equations. For example, a voltage-dependent current source:

$$ I = k \cdot V^2 $$
B1 OUT 0 I=0.001*V(IN)^2

Monte Carlo and Worst-Case Analysis

To simulate component tolerances, append {MC(...)} or {WC(...)} to parameter values. For example, a resistor with 5% tolerance:

R1 N001 0 {Rval} TC=0.001,0.0001

Define Rval in a .param statement with a Gaussian distribution:

.param Rval=MC(1k, 0.05)

Thermal Modeling

Incorporate thermal effects by coupling electrical and thermal domains using LTspice’s thermal components (e.g., Rth, Cth). For a power MOSFET:

* Thermal network example
Rth  TJ TC 2.5  ; Thermal resistance (K/W)
Cth  TC 0 0.1   ; Thermal capacitance (J/K)

4.2 Creating and Managing Symbol Libraries

Symbol File Structure and Syntax

LTspice symbols (.asy files) define component graphical representations and pin mappings. The file structure adheres to a SPICE-compatible syntax:


Version 4
SymbolType CELL
LINE Normal -32 32 32 64
LINE Normal -32 96 32 64
LINE Normal -32 32 -32 96
PIN -32 48 LEFT 8
PINATTR PinName A
PINATTR SpiceOrder 1
    

Key directives include LINE for drawing shapes, PIN for terminal placement, and PINATTR for SPICE netlist connectivity. Pins must map to subcircuit nodes via SpiceOrder.

Custom Symbol Creation

To design a new symbol:

  1. Open the LTspice schematic editor and navigate to File > New Symbol
  2. Use geometric primitives (lines, arcs, rectangles) to construct the visual representation
  3. Place pins with exact alignment to connection points
  4. Define pin attributes matching the SPICE model's node order

For complex components like RF transistors, include industry-standard marker conventions (e.g., emitter arrows for BJTs). Pin spacing should follow IPC-7351 guidelines for manufacturability.

Library Management Techniques

LTspice searches symbol paths in this order:

$$ \text{Search Path} = \begin{cases} \text{Local schematic directory} \\ \text{User lib\sym folder} \\ \text{LTspice installation lib\sym} \end{cases} $$

Organize libraries by:

Use hierarchical blocks for multi-channel components. For a 4-channel ADC:


SYMATTR Prefix X
SYMATTR Value ADC128S102
SYMATTR SpiceModel ADC_8CH
SYMATTR ModelFile ADC.lib
    

Symbol-Subcircuit Binding

The SYMATTR statements link symbols to models:

$$ \text{Binding} = \begin{cases} \text{Prefix X for subcircuits} \\ \text{Value for instance name} \\ \text{SpiceModel for .SUBCKT reference} \\ \text{ModelFile for library path} \end{cases} $$

For parameterized symbols (e.g., transformers with variable turns ratio), use SYMATTR InstName with SPICE parameters:


SYMATTR InstName L1 N=10
SYMATTR SpiceModel XFMR
    

Version Control Integration

For team-based development:

LTspice Symbol Anatomy and Creation Process Diagram showing LTspice symbol file structure with code annotations and corresponding rendered symbol visualization. SYMBOL structure: LINE Normal 1 1 20 20 30 30 RECTANGLE 40 40 80 80 CIRCLE 50 50 10 PIN 0 40 Right 2 PINATTR SpiceOrder 1 SYMATTR Value OPAMP SYMATTR Prefix X Draws line Pin with SpiceOrder Rendered Symbol: IN+ IN- OUT Triangle from LINE directives PIN with SpiceOrder 1 LTspice Symbol Anatomy and Creation Process Symbol File Structure Rendered Symbol
Diagram Description: The section explains symbol file structure and custom symbol creation, which inherently involve spatial relationships and graphical representations that are difficult to visualize from text alone.

4.3 Importing Third-Party Models

LTspice supports the integration of third-party SPICE models, enabling users to simulate components not included in the default library. These models are typically provided by semiconductor manufacturers in the form of .model, .subckt, or .lib files. The process involves proper file placement, syntax validation, and schematic integration.

Supported Model Formats

Third-party models in LTspice generally fall into three categories:

Model Integration Workflow

To import a third-party model:

  1. Download the Model File — Obtain the .lib, .subckt, or .model file from the manufacturer’s website (e.g., Infineon, Texas Instruments).
  2. Place the File in LTspice’s Search Path — Save it in the LTspice installation directory under lib/sub or a custom folder added to the Tools > Control Panel > Sym & Lib Search Paths.
  3. Reference the Model in the Schematic — Use a SPICE directive (.lib filename.lib) or attach the model to a component symbol.

Example: Importing a MOSFET Model

Consider a SiC MOSFET model from Wolfspeed (C3M0065090D.lib):

* Example SPICE directive to include the model
.lib C3M0065090D.lib
* Assign model to a MOSFET instance
X1 D G S C3M0065090D

Debugging Common Issues

Third-party models may fail due to:

Advanced Techniques

For models with temperature or process variations:

$$ I_D = \mu_n C_{ox} \frac{W}{L} \left( (V_{GS} - V_{th})V_{DS} - \frac{V_{DS}^2}{2} \right) (1 + \lambda V_{DS}) $$

Use .step param commands to sweep parameters like Vth or Rds(on) across corners. For Monte Carlo analysis, combine .measure with statistical distributions:

.step param Rval list 1k 1.1k 0.9k
.measure Ids avg(I(D1))

5. Common Simulation Errors and Solutions

5.1 Common Simulation Errors and Solutions

Convergence Failures

LTspice uses iterative numerical methods to solve nonlinear circuit equations. When the Newton-Raphson algorithm fails to converge, you'll encounter errors like "Time step too small" or "Singular matrix". The most common causes are:

To resolve these:

$$ G_{min} = 1 \times 10^{-12} \, \text{S} $$

Add this conductance between every node and ground via SPICE Directive:

.options Gmin=1e-12

Time Step Problems

When simulating circuits with fast transitions (e.g., switching regulators), LTspice may reduce the time step below numerical limits. Modify solver settings:

.tran 0 10ms 0 1u startup uic

Key parameters:

Floating Node Errors

Unconnected nodes generate matrix singularities. LTspice marks these with the warning "Node X is floating". Solutions include:

.nodeset V(out)=5

Model Implementation Issues

Third-party SPICE models often contain syntax errors. For subcircuits, ensure:

For behavioral sources, verify that expressions adhere to:

$$ V = f(t, \, V(n_1), \, V(n_2), \, \ldots) $$

Accuracy vs. Speed Tradeoffs

Modify these .options for challenging circuits:

.options abstol=1n reltol=0.01 vntol=1m
Parameter Default Typical Adjustment
abstol (current) 1pA 1nA
reltol 0.001 0.01
vntol (voltage) 1μV 1mV

5.2 Optimizing Simulation Speed and Accuracy

Trade-offs Between Speed and Accuracy

LTspice simulations involve a delicate balance between computational efficiency and result precision. The primary factors influencing this trade-off are:

Time Step Optimization

The simulation time step (TSTEP) fundamentally determines both accuracy and speed. For a signal with highest frequency component fmax, the Nyquist criterion requires:

$$ TSTEP < \frac{1}{2f_{max}} $$

However, practical implementations should use:

$$ TSTEP = \frac{1}{10f_{max}} $$

LTspice's adaptive time stepping can be controlled through:

Convergence Parameters

Nonlinear circuit elements require iterative solvers. Key parameters include:

$$ G_{min} = 1 \times 10^{-12} \text{ (Default conductance for numerical stability)} $$

Adjustable parameters:

Advanced Solver Settings

For stiff systems, the alternate solver often provides better performance:


.options method=gear
.options maxord=2
  

The Gear method, while more stable for stiff systems, requires additional computation per time step. The order (maxord) affects both accuracy and memory usage.

Component-Level Optimization

Device models significantly impact simulation efficiency:

Parallel Processing

LTspice supports multicore processing through:


.options numthreads=4
  

The optimal thread count depends on both CPU architecture and circuit complexity. Benchmark tests show diminishing returns beyond 4-8 threads for most designs.

Waveform Compression

For long transient simulations, waveform storage can become limiting. The compression factor balances memory usage against signal fidelity:


.options plotwinsize=0
.options plotcompress=1
  

Setting plotwinsize=0 disables compression, while higher values reduce storage requirements at the cost of waveform resolution.

5.3 Debugging Complex Circuits

Debugging complex circuits in LTspice requires systematic analysis of convergence errors, numerical instabilities, and unintended interactions between components. Advanced users must leverage built-in diagnostic tools, interpret simulation logs, and apply targeted modifications to resolve issues.

Identifying Convergence Failures

Convergence errors occur when the Newton-Raphson iterative solver fails to find a stable operating point. Common symptoms include:

Modify solver settings via Control Panel → SPICE:

.options reltol=1e-3
.options abstol=1e-6
.options vntol=1e-6

Analyzing Numerical Instabilities

High-Q resonant circuits or stiff systems may require:

$$ \tau = \frac{L}{R} \quad \text{(Time constant)} $$
$$ f_{\text{max}} = \frac{1}{2\pi\sqrt{LC}} \quad \text{(Resonant frequency)} $$

Apply these mitigation strategies:

Signal Integrity Diagnostics

For high-frequency circuits, probe these metrics:

$$ \text{SNR} = 10 \log_{10}\left(\frac{P_{\text{signal}}}{P_{\text{noise}}}\right) $$

Key steps:

  1. Run AC analysis to identify unintended resonances.
  2. Check impedance matching with .meas AC Zout FIND V(out)/I(V1) AT 1MHz.
  3. Use FFT (.four) to analyze harmonic distortion.

Case Study: Power Supply Oscillations

A 5V buck converter exhibits 200mV ringing at 2MHz:

$$ \text{Phase Margin} = 180° - \tan^{-1}\left(\frac{f_c}{f_p}\right) + \tan^{-1}\left(\frac{f_c}{f_z}\right) $$
Buck Converter Ringing Analysis A combined waveform plot and annotated schematic showing the ringing effect in a buck converter output, with LC tank circuit and damping resistor. 5V DC 200mV 500ns (2MHz) Time Voltage 10µH 100nF 22Ω LC Tank Circuit with Damping Resistor Vout
Diagram Description: The case study on power supply oscillations would benefit from a diagram showing the ringing waveform and LC tank circuit to visualize the root cause and solution.

6. Official LTspice Documentation

6.1 Official LTspice Documentation

6.2 Recommended Books and Guides

6.3 Online Resources and Communities