With a CD4011 dual-produced sound and light control delay lamp circuit

Posted on Nov 10, 2015

The main circuit uses a two-input NAND gate four digital integrated circuits, wherein the composition

With a CD4011 dual-produced sound and light control delay lamp circuit
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of NAND gate III microphone amplifier circuit; NAND gate t composition and the amplified signal light control "and gate" Control i NAND gate and NAND I gate II composition monostable delay control circuit. The entire circuit is powered by a resistor R8 buck, VD2 half-wave rectifier, filter capacitor C4 is supplied with. Static, with the input of the NAND gate I due R2 connected to the positive power supply, so the output of lo pin is low, NAND gate t12 foot logic "O" so whether l3 feet daytime logic "O" or night logic "1", its output pin 11 always lose out logic "1." II logic input NAND gate terminal 5,6 feet "0", the output terminal 4-pin output logic "1", so this time I NAND gate of two inputs l, 2 feet are logic "l", 3 is a logic output terminal "O". When the AC power is positive half cycle (ie, the positive negative), the SCR vs non-conducting condition off, then AC by VD2 half-wave rectifier circuit to provide electrical source. When a negative half-cycle alternating current (ie, the negative in positive), the resistance R8, R7 series vs provide for the trigger current, static due to the 3-pin output logic state "O", the forward current through R7, R6, VD1 and NAND gate I 3 feet into the ground, vs gate at a low level, vs off, so H lamp does not light. When B receives the microphone after the acoustic signal environment corresponding output electrical signal, this signal is cl coupled to the NAND gate III after input of 8,9 feet, amplifying the signal output from the IO pins. When the positive half cycle peak value of the audio signal exceeds the NAND gate t Min value level, the NAND gate t flip. II pin output logic "0" (set at this dark environment, 13 feet for the logic level "1"), so I NAND gate 3 feet output logic "l", a diode VDI off, vs will get triggered by R7 current opening of the lamp H lights up. At the same time, 3 feet high by making the input coupling capacitor C3 NAND II 5,6 two feet high, so the output 4-pin output logic "O", and added directly to the NAND gate I 2 feet. At this point even the 10 foot level changes occurred with the audio already, so I NAND gate 1 at logical "l", but due to 2 feet for a logic "O" on the insurance certificate of the 3-pin output logic "l", H still so light stays on. In light while high by 3 feet on to charge the capacitor C3 R5, the voltage across the capacitor rising. Therefore, NAND gate I1 input of 5,6 feet level constantly decreases, when the level is below the threshold input NAND gate, four feet will output logic "l", at this time if the environment is no longer sound, 1 pin for logic "l", the 3-pin output logic "O", SCR vs off, light H goes out. If the ambient sound again, the lamp can be lit again. The duration of the lighting lamp is mainly determined by R5 and C3 of the charging time constant. R4 and photodiode light control circuit VD3 composition night VD3 showed high resistance, so that 13 feet high "l", which with the output of NAND gate t II foot level when the level depends only on the level change of 12 feet , that depends only on whether the ring Tu sound decision. During the day, VD3 was low resistance, making 13 feet at a logic "0 '', thus blocking the NAND gate t, so controllable silicon vs from environmental sound control lamp H is never lit.

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