Non-inverting Operational Amplifier

1. Basic Circuit Configuration

1.1 Basic Circuit Configuration

The non-inverting operational amplifier (op-amp) configuration is a fundamental building block in analog electronics, providing high input impedance, controlled gain, and stable amplification. Unlike the inverting configuration, the input signal is applied directly to the non-inverting terminal (+), preserving phase alignment while allowing precise gain adjustment via external resistors.

Circuit Topology and Key Components

The core elements of a non-inverting op-amp circuit include:

Op-Amp + − Vin R2 R1 Vout

Gain Derivation and Analysis

Assuming an ideal op-amp, the voltage at the inverting terminal (−) equals the input voltage at the non-inverting terminal (+) due to the virtual short principle. The feedback network forms a voltage divider, leading to the following relationship:

$$ V^- = V^+ = V_{in} $$

The output voltage Vout is determined by the current through R1 and R2:

$$ V_{out} = V_{in} + I_f R_2 $$

Since the input impedance is infinite, the current through R1 equals the current through R2:

$$ I_f = \frac{V_{in}}{R_1} $$

Substituting and simplifying yields the closed-loop gain (Av):

$$ A_v = \frac{V_{out}}{V_{in}} = 1 + \frac{R_2}{R_1} $$

Practical Considerations

In real-world applications, non-ideal op-amp characteristics must be accounted for:

  • Finite Gain-Bandwidth Product (GBW): Limits the usable bandwidth at higher gains.
  • Input Offset Voltage: Introduces DC error; mitigated with trimming or chopper-stabilized op-amps.
  • Power Supply Rejection Ratio (PSRR): Affects noise immunity in noisy environments.

For high-precision designs, resistor tolerance and temperature coefficients (e.g., 0.1% metal-film resistors) are critical to minimize gain drift.

Non-inverting Op-Amp Basic Configuration Schematic diagram of a non-inverting operational amplifier with labeled terminals, feedback network (R1 and R2), input signal path (Vin), and output connection (Vout). Vin + - Vout R1 R2
Diagram Description: The diagram would physically show the op-amp symbol with labeled terminals, the feedback network (R1 and R2), input signal path, and output connection.

1.2 Key Characteristics and Parameters

Gain and Feedback Mechanism

The voltage gain of a non-inverting operational amplifier is determined by the feedback network, consisting of resistors R1 and R2. The closed-loop gain ACL is derived from the feedback factor β, where β = R1 / (R1 + R2). Using the ideal op-amp assumptions (infinite open-loop gain, infinite input impedance, and zero output impedance), the closed-loop gain simplifies to:

$$ A_{CL} = 1 + \frac{R_2}{R_1} $$

This equation highlights the amplifier’s dependence on external resistors rather than intrinsic op-amp parameters, making it highly stable and predictable.

Input and Output Impedance

The non-inverting configuration exhibits near-infinite input impedance due to the op-amp’s differential input stage. In practice, input impedance is limited by the op-amp’s datasheet specifications (typically >1 MΩ for JFET-input op-amps and >1012 Ω for CMOS variants). The output impedance is drastically reduced by negative feedback, approximating:

$$ Z_{out} \approx \frac{Z_{out(open-loop)}}{1 + A_{OL} \beta} $$

where AOL is the open-loop gain and Zout(open-loop) is the native output impedance of the op-amp (typically 50–200 Ω).

Bandwidth and Slew Rate Limitations

The gain-bandwidth product (GBW) dictates the frequency response. For a non-inverting amplifier, the bandwidth BW scales inversely with the closed-loop gain:

$$ BW = \frac{GBW}{A_{CL}} $$

Slew rate (SR), the maximum rate of output voltage change, is constrained by internal compensation and is critical for large-signal applications. Exceeding SR causes distortion, quantified by:

$$ SR = \frac{dV_{out}}{dt} \bigg|_{max} $$

Common-Mode Rejection Ratio (CMRR)

CMRR measures the amplifier’s ability to reject input signals common to both terminals. For a non-inverting op-amp, CMRR is typically 70–100 dB, ensuring minimal output error from common-mode voltages. The output error due to finite CMRR is:

$$ V_{error} = \frac{V_{CM}}{CMRR} \times A_{CL} $$

Noise and Offset Considerations

Input-referred noise (thermal and flicker) and input offset voltage (VOS) introduce DC and AC errors. Auto-zero or chopper-stabilized op-amps mitigate these effects. The total output offset is:

$$ V_{out(offset)} = V_{OS} \left(1 + \frac{R_2}{R_1}\right) + I_{Bias} R_2 $$

where IBias is the input bias current.

Stability and Phase Margin

Negative feedback stability requires a phase margin >45°. Dominant-pole compensation ensures stability by rolling off gain at -20 dB/decade before secondary poles introduce phase shift. The phase margin φm is:

$$ \phi_m = 180° - \angle A_{OL}(f_c) \beta(f_c) $$

where fc is the crossover frequency.

Practical Design Trade-offs

1.3 Comparison with Inverting Amplifiers

The non-inverting and inverting operational amplifier configurations serve distinct purposes in analog circuit design, each offering unique advantages and trade-offs. A rigorous comparison between the two topologies reveals critical differences in gain, input impedance, phase response, and noise performance.

Gain and Phase Characteristics

The closed-loop voltage gain of a non-inverting amplifier is given by:

$$ A_{v,\text{non-inv}} = 1 + \frac{R_f}{R_g} $$

where Rf is the feedback resistor and Rg is the ground-connected resistor. In contrast, the inverting amplifier's gain is:

$$ A_{v,\text{inv}} = -\frac{R_f}{R_g} $$

The negative sign indicates a 180° phase inversion, which is absent in the non-inverting configuration. This phase preservation is critical in applications requiring signal coherence, such as feedback control systems or instrumentation chains.

Input Impedance and Loading Effects

The non-inverting configuration exhibits exceptionally high input impedance, theoretically infinite for an ideal op-amp, as the input signal connects directly to the high-impedance non-inverting terminal. The differential input impedance Zin,diff and common-mode input impedance Zin,cm dominate the behavior:

$$ Z_{in,\text{non-inv}} \approx Z_{in,cm} \parallel (Z_{in,diff} \times (1 + A_{ol}\beta)) $$

where Aol is the open-loop gain and β is the feedback factor. Conversely, the inverting amplifier's input impedance is approximately Rg, creating potential loading effects on the signal source.

Noise and Offset Considerations

Both configurations exhibit different noise gain characteristics. The non-inverting amplifier's noise gain equals its signal gain, while the inverting amplifier has a noise gain of:

$$ NG_{\text{inv}} = 1 + \frac{R_f}{R_g} $$

This difference becomes significant in low-noise design, as the op-amp's input-referred voltage noise is amplified by the noise gain. Additionally, the non-inverting configuration tends to exhibit better common-mode rejection as both inputs track the same signal.

Practical Implementation Trade-offs

In high-frequency applications, the non-inverting configuration's input capacitance becomes significant, potentially requiring compensation techniques not needed for inverting designs. The choice between configurations ultimately depends on the specific requirements for impedance, gain, phase, and noise in the target application.

2. Voltage Gain Derivation

2.1 Voltage Gain Derivation

The voltage gain of a non-inverting operational amplifier (op-amp) is derived from the fundamental properties of negative feedback and the ideal op-amp assumptions. Consider the standard non-inverting configuration where the input signal Vin is applied to the non-inverting terminal, and a feedback network consisting of resistors R1 and R2 connects the output to the inverting terminal.

Ideal Op-Amp Assumptions

For the derivation, we assume the op-amp operates ideally, meaning:

Feedback Network Analysis

The feedback network creates a voltage divider between the output Vout and the inverting input. The voltage at the inverting terminal (V−) is:

$$ V_{-} = V_{out} \left( \frac{R_1}{R_1 + R_2} \right) $$

Virtual Short Principle

Due to the high open-loop gain, the differential input voltage (V+ − V−) approaches zero, enforcing a virtual short between the inverting and non-inverting terminals:

$$ V_{+} \approx V_{-} $$

Since V+ = Vin, substituting into the feedback equation yields:

$$ V_{in} = V_{out} \left( \frac{R_1}{R_1 + R_2} \right) $$

Voltage Gain Expression

Rearranging the equation to solve for the closed-loop gain (ACL):

$$ A_{CL} = \frac{V_{out}}{V_{in}} = 1 + \frac{R_2}{R_1} $$

This result shows that the gain is determined solely by the external resistor ratio, independent of the op-amp's open-loop gain (assuming it is sufficiently high).

Practical Implications

In real-world applications, the non-inverting amplifier's gain stability relies on precise resistor matching. Temperature coefficients and tolerances of R1 and R2 directly affect gain accuracy. For high-frequency signals, the op-amp's bandwidth limitations must also be considered, as the gain-bandwidth product (GBW) constrains the usable frequency range.

Vin Vout R1 R2
Non-inverting Op-Amp Configuration Schematic diagram of a non-inverting operational amplifier configuration with input signal Vin, output signal Vout, feedback resistors R1 and R2, and signal flow paths. R1 R2 Vin Vout + - +Vcc -Vee
Diagram Description: The diagram would physically show the non-inverting op-amp configuration with input/output terminals, feedback resistors, and signal flow paths.

2.2 Input and Output Impedance

The input and output impedance of a non-inverting operational amplifier (op-amp) configuration play a critical role in determining its performance in real-world circuits. Unlike the inverting configuration, the non-inverting topology exhibits distinct impedance characteristics due to its feedback network and the inherent properties of the op-amp.

Input Impedance

The input impedance of a non-inverting amplifier is exceptionally high, a direct consequence of the op-amp's differential input stage. In an ideal op-amp, the input impedance is infinite, but in practice, it is limited by the op-amp's internal design and the feedback network.

For a non-inverting amplifier with a voltage gain Av given by:

$$ A_v = 1 + \frac{R_f}{R_1} $$

the input impedance Zin is derived by considering the feedback effect. The differential input voltage Vd is:

$$ V_d = \frac{V_{out}}{A_{OL}} $$

where AOL is the open-loop gain of the op-amp. The input current Iin is negligible due to the high input impedance of the op-amp itself. Thus, the effective input impedance Zin is approximately:

$$ Z_{in} \approx Z_{in(OL)} \cdot (1 + A_{OL} \beta) $$

where Zin(OL) is the open-loop input impedance and β is the feedback factor, given by:

$$ \beta = \frac{R_1}{R_1 + R_f} $$

This demonstrates that the negative feedback significantly increases the input impedance, making the non-inverting amplifier ideal for high-impedance sensor interfaces and buffering applications.

Output Impedance

The output impedance of a non-inverting amplifier is drastically reduced by negative feedback. An ideal op-amp has zero output impedance, but real op-amps exhibit a finite output resistance Rout(OL).

The closed-loop output impedance Zout is derived from the feedback action:

$$ Z_{out} = \frac{R_{out(OL)}}{1 + A_{OL} \beta} $$

Since AOL is typically very large (105 to 106), the output impedance becomes extremely low, often in the milliohm range. This makes the non-inverting amplifier an excellent voltage buffer, capable of driving low-impedance loads without significant signal degradation.

Practical Implications

In real-world applications, the high input impedance minimizes loading effects on the source, preserving signal integrity. For example, in piezoelectric sensor interfaces, the non-inverting configuration ensures minimal signal attenuation due to its near-infinite input impedance.

Conversely, the low output impedance allows the amplifier to drive transmission lines or multiple loads without significant voltage drop. This is critical in audio amplifiers and active filter designs, where maintaining signal strength across varying loads is essential.

Parasitic capacitances and inductances, however, can affect high-frequency performance. At higher frequencies, the input capacitance of the op-amp and PCB traces introduce additional impedance components, necessitating careful layout and compensation techniques.

2.3 Bandwidth Considerations

The bandwidth of a non-inverting operational amplifier is fundamentally governed by the gain-bandwidth product (GBW), an intrinsic property of the op-amp. For an ideal single-pole amplifier, the closed-loop bandwidth (fCL) is inversely proportional to the noise gain (Gn):

$$ f_{CL} = \frac{GBW}{G_n} $$

where Gn for a non-inverting configuration is given by:

$$ G_n = 1 + \frac{R_f}{R_g} $$

Here, Rf and Rg are the feedback and ground resistors, respectively. This relationship implies that increasing the closed-loop gain reduces the available bandwidth. For example, an op-amp with a GBW of 10 MHz configured for a gain of 10 will exhibit a bandwidth of approximately 1 MHz.

Frequency Response and Dominant Pole Compensation

Most op-amps are internally compensated to ensure stability, introducing a dominant pole (fp) that rolls off the open-loop gain at -20 dB/decade. The closed-loop bandwidth is determined by the intersection of the open-loop gain curve and the noise gain line. A Bode plot illustrates this behavior, showing:

Slew Rate Limitations

At high frequencies, the amplifier's slew rate (SR) becomes critical. The maximum sinusoidal frequency (fmax) before slew-induced distortion occurs is:

$$ f_{max} = \frac{SR}{2\pi V_{pk}} $$

where Vpk is the peak output voltage. Exceeding this limit results in nonlinear distortion, as the op-amp cannot transition fast enough to track the input signal.

Phase Margin and Stability

While bandwidth is primarily a small-signal characteristic, phase margin must be considered to avoid oscillations. A non-inverting amplifier with excessive capacitive loading or high noise gain may suffer from reduced phase margin, leading to peaking or instability. The phase margin (ϕm) can be approximated as:

$$ \phi_m \approx 90^\circ - \tan^{-1}\left(\frac{f_{CL}}{f_{p2}}\right) $$

where fp2 is the second pole frequency. Maintaining ϕm > 45° is generally advisable for stable operation.

Practical Design Implications

In high-speed applications, designers must balance:

For instance, a video amplifier requiring 100 MHz bandwidth at unity gain would necessitate an op-amp with a GBW exceeding 100 MHz and a slew rate sufficient to handle the expected voltage swings.

Non-inverting Op-Amp Bode Plot A Bode plot illustrating open-loop gain (A_OL) and noise gain (G_n) curves, with labeled -3 dB point, bandwidth (f_CL), and gain-bandwidth product (GBW). Frequency (Hz) 10 100 1k 10k 100k 1M 10M 100 60 20 -20 -60 Gain (dB) A_OL (-20 dB/decade) G_n -3 dB GBW f_CL
Diagram Description: A Bode plot would visually show the open-loop gain curve intersecting the noise gain line, illustrating the -3 dB point and bandwidth relationship.

3. Choosing the Right Components

3.1 Choosing the Right Components

The performance of a non-inverting operational amplifier circuit hinges on selecting appropriate components, each influencing gain accuracy, bandwidth, noise, and stability. Key considerations include the operational amplifier (op-amp) itself, feedback resistors, and decoupling capacitors.

Operational Amplifier Selection

The op-amp must meet the circuit’s requirements for bandwidth, slew rate, input impedance, and noise. For high-precision applications, low-offset-voltage op-amps like the OPA2170 (Texas Instruments) or ADA4522 (Analog Devices) are ideal. High-speed applications demand op-amps with wide gain-bandwidth products (GBW), such as the THS3491 (1.9 GHz GBW).

The closed-loop gain bandwidth is determined by:

$$ f_{-3dB} = \frac{GBW}{1 + \frac{R_f}{R_g}} $$

where Rf and Rg are the feedback and ground resistors, respectively. If the signal frequency approaches f-3dB, gain error increases due to the op-amp’s finite bandwidth.

Feedback and Gain Resistors

The resistors Rf and Rg set the non-inverting gain:

$$ A_v = 1 + \frac{R_f}{R_g} $$

Precision metal-film resistors (0.1% tolerance or better) minimize gain error. Values should be chosen to:

For example, selecting Rf = 10kΩ and Rg = 1kΩ yields Av = 11, but higher resistances may introduce noise.

Decoupling and Stability

Bypass capacitors (typically 0.1µF ceramic) near the op-amp’s power pins suppress high-frequency noise. For stability, ensure the phase margin exceeds 45° by analyzing the open-loop gain and feedback network. A small feedback capacitor Cf can compensate for stray capacitance:

$$ C_f = \frac{1}{2 \pi R_f f_u} $$

where fu is the unity-gain frequency. For instance, with Rf = 10kΩ and fu = 10MHz, Cf ≈ 1.6pF.

Practical Considerations

3.2 Stability and Compensation Techniques

Phase Margin and Stability Criteria

The stability of a non-inverting operational amplifier is determined by its phase margin, defined as the difference between the open-loop phase shift and -180° at the frequency where the loop gain magnitude drops to unity (0 dB). A phase margin of at least 45° is typically required to avoid excessive ringing, while >60° ensures critically damped transient response. The Barkhausen stability criterion states that instability occurs if the loop gain satisfies:

$$ |A(\omega)\beta(\omega)| \geq 1 \quad \text{and} \quad \angle A(\omega)\beta(\omega) = -180^\circ $$

Dominant Pole Compensation

To improve stability, dominant pole compensation introduces a low-frequency pole (fp1) that rolls off the gain before higher-frequency poles cause excessive phase lag. This is achieved by adding a capacitor (Cc) across an internal high-impedance node, such as the compensation pin in decompensated op-amps. The modified transfer function becomes:

$$ A(s) = \frac{A_0}{(1 + s/\omega_{p1})(1 + s/\omega_{p2})} $$

where ωp1 = 1/(RcompCc) dominates the frequency response. The gain-bandwidth product (GBW) is then approximately:

$$ \text{GBW} \approx A_0 \cdot \omega_{p1} $$

Miller Compensation

A common implementation uses the Miller effect, where a capacitor (CM) is connected between the input and output of an inverting gain stage. This effectively multiplies the capacitance by the stage gain (1 + Av), creating a dominant pole at:

$$ \omega_{\text{dominant}} = \frac{1}{R_{\text{out}}C_M(1 + A_v)} $$

This technique reduces the required physical capacitor size while providing sufficient phase margin. However, it introduces a right-half-plane zero at:

$$ \omega_z = \frac{1}{R_{\text{out}}C_M} $$

which can degrade stability if not addressed.

Nulling Resistor Technique

To mitigate the right-half-plane zero in Miller compensation, a series resistor (Rz) is added to the compensation capacitor. When Rz ≈ 1/gm (where gm is the transconductance of the preceding stage), the zero is moved to the left-half plane, improving phase margin. The modified zero location becomes:

$$ \omega_z = \frac{1}{C_M(1/g_m - R_z)} $$

Feedforward Compensation

In high-speed amplifiers, feedforward paths bypass the dominant pole stage at higher frequencies, extending bandwidth without sacrificing stability. This is implemented via a small capacitor (Cff) from the input to a high-impedance node in the output stage. The technique introduces an additional zero at:

$$ \omega_z = \frac{g_{m2}}{C_{ff}} $$

where gm2 is the transconductance of the feedforward stage.

Practical Considerations

Open-Loop Gain (AOL) Phase Margin (φm) f0dB
Bode Plot and Compensation Techniques A combined diagram showing the Bode plot (magnitude and phase response) of a non-inverting operational amplifier alongside schematic snippets illustrating compensation techniques (Miller capacitor and nulling resistor). Frequency (Hz) Magnitude (dB) Phase (°) A(ω) φ(ω) f_p1 GBW Phase margin Miller Compensation C_M Nulling Resistor R_z
Diagram Description: The section discusses phase margin, pole-zero locations, and compensation techniques that require visualization of frequency response curves and circuit modifications.

3.3 Common Design Pitfalls and Solutions

Input Bias Current and Offset Voltage Errors

A non-inverting amplifier's performance is highly sensitive to input bias currents (IB) and input offset voltage (VOS). These non-idealities introduce DC errors at the output, particularly problematic in precision applications. The output error due to VOS is amplified by the noise gain (1 + Rf/Ri), while bias currents create voltage drops across input resistors.

$$ V_{\text{out,error}} = \left(1 + \frac{R_f}{R_i}\right)V_{OS} + I_B R_f $$

Solution: Minimize resistor values to reduce thermal noise and IB-induced errors. For bipolar op-amps, match the Thevenin equivalent resistance at both inputs. For FET-input op-amps, use lower resistor values since bias currents are negligible.

Stability and Phase Margin Issues

High closed-loop gains can reduce phase margin, leading to peaking or oscillation. This occurs because the op-amp's open-loop gain rolls off with frequency, introducing phase lag. The feedback network's parasitic capacitance exacerbates this issue, forming unintentional poles.

$$ \phi_{\text{margin}} = 180^\circ - \angle A_{\text{OL}}(f_c) - \angle \beta(f_c) $$

Solution: Insert a small capacitor (Cf) across Rf to introduce a compensating zero. The value should satisfy:

$$ C_f = \frac{1}{2\pi R_f f_{\text{unity}}} $$

Power Supply Rejection Ratio (PSRR) Degradation

Non-inverting amplifiers are susceptible to power supply noise due to finite PSRR. High-frequency noise bypasses the op-amp's internal regulation, appearing directly at the output. This is critical in mixed-signal systems where digital switching noise couples into analog rails.

Solution: Use low-ESR decoupling capacitors (0.1 μF ceramic + 10 μF tantalum) at the supply pins. For ultra-low-noise designs, employ linear regulators instead of switching supplies. A common-mode choke can suppress high-frequency noise.

Thermal Drift in Gain Setting Resistors

Mismatched temperature coefficients (TC) between Rf and Ri cause gain drift. For example, a 100 ppm/°C mismatch in a gain-of-10 circuit introduces 0.1% gain error per °C. Thin-film resistors (5–25 ppm/°C) outperform carbon composition (500 ppm/°C).

$$ \frac{\Delta G}{G} = \left(TC_{R_f} - TC_{R_i}\right) \Delta T $$

Solution: Use resistor networks with matched TC or precision thin-film resistors. For critical applications, actively temperature-control the gain-setting network.

Common-Mode Limitations in High-Voltage Designs

Exceeding the op-amp's common-mode input range (VCM) causes phase inversion or latch-up. This is particularly problematic in single-supply designs where the input nears ground. Modern rail-to-rail input op-amps mitigate this but introduce crossover distortion.

Solution: For high-voltage inputs, use a resistive divider before the op-amp or select devices with VCM exceeding the maximum input. Differential amplifiers handle wide common-mode ranges better.

4. Signal Conditioning

4.1 Signal Conditioning

Signal conditioning in a non-inverting operational amplifier (op-amp) configuration involves modifying the input signal to meet specific requirements for amplification, noise reduction, or impedance matching. The non-inverting topology inherently provides high input impedance and low output impedance, making it ideal for interfacing with sensors or weak signal sources.

Gain and Bandwidth Considerations

The closed-loop gain ACL of a non-inverting amplifier is determined by the feedback network:

$$ A_{CL} = 1 + \frac{R_f}{R_g} $$

where Rf is the feedback resistor and Rg is the ground resistor. The gain-bandwidth product (GBW) of the op-amp imposes a fundamental limit on the usable bandwidth:

$$ f_{-3dB} = \frac{GBW}{A_{CL}} $$

For precision applications, select an op-amp with a GBW at least 10× the required bandwidth to minimize phase margin degradation.

Noise Reduction Techniques

Thermal noise from resistors and voltage noise from the op-amp dominate the noise performance. The total input-referred noise voltage vn can be approximated as:

$$ v_n = \sqrt{v_{n,op}^2 + 4kTR_f + 4kTR_g} $$

where k is Boltzmann's constant and T is absolute temperature. To minimize noise:

DC Offset Management

The input offset voltage Vos gets amplified by the closed-loop gain, creating an output error:

$$ V_{out,offset} = V_{os} \left(1 + \frac{R_f}{R_g}\right) $$

For critical DC applications, either:

Practical Implementation Example

Consider conditioning a 0-100 mV thermocouple signal for a 0-3.3V ADC input. A non-inverting configuration with Rf=100 kΩ and Rg=3.3 kΩ provides:

$$ A_{CL} = 1 + \frac{100k}{3.3k} \approx 31.3 $$

A low-noise JFET-input op-amp (e.g., OPA140) with 5.5 nV/√Hz noise density and 100 μV maximum offset would yield:

$$ v_n \approx \sqrt{(5.5 \times 10^{-9})^2 + 4(1.38 \times 10^{-23})(298)(100k + 3.3k)} \approx 8.2\ \text{nV/√Hz} $$

With a 100 Hz bandwidth filter, this achieves 82 nV RMS noise - adequate for 12-bit resolution across the 3.3V range.

4.2 Buffering and Impedance Matching

A non-inverting operational amplifier configuration is frequently employed as a voltage buffer when configured with unity gain (i.e., \( R_f = 0 \) and \( R_g = \infty \)). In this mode, the circuit exhibits an extremely high input impedance and low output impedance, making it ideal for impedance matching between high-source-impedance sensors and low-impedance loads.

Input and Output Impedance Analysis

The input impedance of a non-inverting amplifier is dominated by the operational amplifier's intrinsic input impedance, which is typically in the range of \( 10^6 \) to \( 10^{12} \, \Omega \). The closed-loop input impedance \( Z_{in} \) is further enhanced by negative feedback and can be approximated as:

$$ Z_{in} \approx Z_{in(OL)} \cdot (1 + A_{OL} \beta) $$

where:

The output impedance \( Z_{out} \) is drastically reduced due to feedback and is given by:

$$ Z_{out} \approx \frac{Z_{out(OL)}}{1 + A_{OL} \beta} $$

where \( Z_{out(OL)} \) is the open-loop output impedance. For precision amplifiers, \( Z_{out} \) can be as low as milliohms, ensuring minimal signal degradation when driving heavy loads.

Practical Applications in Buffering

In scenarios where a high-impedance source (e.g., a piezoelectric sensor or pH probe) must drive a low-impedance load (e.g., an ADC or transmission line), a unity-gain buffer prevents signal attenuation. Consider a sensor with an output impedance \( Z_s = 10 \, k\Omega \) connected to a load \( Z_L = 100 \, \Omega \). Without buffering, the voltage divider effect would attenuate the signal by:

$$ \frac{V_L}{V_s} = \frac{Z_L}{Z_s + Z_L} \approx 0.01 $$

By inserting a non-inverting buffer, the sensor sees near-infinite impedance, while the op-amp's low output impedance efficiently drives the load.

Frequency-Dependent Impedance Considerations

At high frequencies, the op-amp's open-loop gain \( A_{OL} \) rolls off, reducing the effectiveness of feedback in lowering \( Z_{out} \). The output impedance can be modeled as:

$$ Z_{out}(f) \approx \frac{Z_{out(OL)}}{1 + A_{OL}(f) \beta} $$

where \( A_{OL}(f) \) decreases with frequency. Consequently, maintaining low \( Z_{out} \) at higher frequencies requires an op-amp with sufficient gain-bandwidth product (GBW).

Case Study: Driving Capacitive Loads

When driving capacitive loads (\( C_L \)), the op-amp's output impedance interacts with \( C_L \), introducing a pole that can destabilize the circuit. The pole frequency is:

$$ f_p = \frac{1}{2 \pi Z_{out} C_L} $$

To mitigate this, a small series resistor (\( R_{iso} \)) is often added between the op-amp output and \( C_L \), introducing a zero that compensates for the pole:

$$ f_z = \frac{1}{2 \pi R_{iso} C_L} $$

Proper selection of \( R_{iso} \) (typically 10–100 \( \Omega \)) ensures stability while maintaining low output impedance at DC.

Non-inverting Buffer Impedance Analysis Schematic diagram of a non-inverting buffer configuration with impedance annotations and frequency response inset, showing source, op-amp, feedback network, and load interactions. Vs Zs + - β (feedback) ZL CL Riso Zin(OL) Zout(OL) AOL(f)
Diagram Description: The section discusses impedance relationships and frequency-dependent behavior, which are best visualized with a schematic showing the buffer configuration and impedance interactions.

4.3 Active Filters

Fundamentals of Active Filter Design

Active filters leverage operational amplifiers (op-amps) to implement frequency-selective circuits without relying on passive inductors. Unlike passive RC or LC filters, active filters provide gain, high input impedance, and low output impedance, making them ideal for signal conditioning and anti-aliasing applications. The non-inverting op-amp configuration is particularly advantageous due to its high input impedance and stable gain characteristics.

The transfer function of a non-inverting op-amp based active filter is derived from the general form:

$$ H(s) = \frac{V_{out}(s)}{V_{in}(s)} = \left(1 + \frac{R_f}{R_i}\right) \cdot \frac{N(s)}{D(s)} $$

where N(s) and D(s) are polynomials in the Laplace variable s, determined by the filter topology (e.g., Butterworth, Chebyshev, or Bessel).

First-Order Low-Pass Active Filter

A first-order low-pass filter can be constructed by adding a capacitor in parallel with the feedback resistor Rf of a non-inverting amplifier. The cutoff frequency (fc) is given by:

$$ f_c = \frac{1}{2\pi R_f C} $$

The transfer function for this configuration is:

$$ H(s) = \left(1 + \frac{R_f}{R_i}\right) \cdot \frac{1}{1 + sR_f C} $$

This design is limited by its shallow roll-off (-20 dB/decade), making it suitable only for basic applications where steep attenuation is not critical.

Second-Order Sallen-Key Topology

For steeper roll-off (-40 dB/decade), a second-order Sallen-Key filter is employed. The non-inverting variant uses two resistors and two capacitors to form a feedback network. The transfer function is:

$$ H(s) = \left(1 + \frac{R_3}{R_4}\right) \cdot \frac{1}{1 + s(R_1 C_1 + R_2 C_2) + s^2 R_1 R_2 C_1 C_2} $$

The quality factor (Q) and resonant frequency (ω0) are critical for determining filter behavior:

$$ \omega_0 = \frac{1}{\sqrt{R_1 R_2 C_1 C_2}} $$ $$ Q = \frac{\sqrt{R_1 R_2 C_1 C_2}}{R_1 C_1 + R_2 C_2} $$

For a Butterworth response (Q = 0.707), component values are typically chosen such that R1 = R2 and C1 = C2.

Higher-Order Filter Design

Cascading multiple second-order stages enables higher-order filters (e.g., 4th or 6th order). Each stage is tuned to a different frequency and Q to achieve the desired passband ripple and stopband attenuation. For example, a 4th-order Butterworth filter requires two stages with:

$$ Q_1 = 0.541 \quad \text{and} \quad Q_2 = 1.306 $$

Component values are calculated using polynomial coefficients from filter design tables or software tools like MATLAB or SPICE.

Practical Considerations

Active filters are sensitive to op-amp limitations, including:

For precision applications, use 1% tolerance components and low-noise op-amps (e.g., OPA2134 for audio, LTC6268 for RF).

Applications

Non-inverting active filters are widely used in:

Non-inverting Active Filter Topologies Side-by-side schematics of first-order low-pass and second-order Sallen-Key non-inverting active filter configurations with labeled components and nodes. + - R_f R_i C GND V_in V_out First-Order Low-Pass f_c = 1/(2πR_fC) + - R_f R_1 R_2 C_1 C_2 GND GND V_in V_out Sallen-Key (2nd Order) f_c = 1/(2π√(R_1R_2C_1C_2))
Diagram Description: The section describes circuit topologies (e.g., Sallen-Key filter) and component relationships that are inherently spatial and require visual representation of connections.

5. Recommended Textbooks

5.1 Recommended Textbooks

5.2 Online Resources and Datasheets

5.3 Advanced Topics for Further Study