Low Cost Pulse Generator circuit

Posted on May 13, 2017

This pulse generator produces square pulses from 1Hz to 100KHz with adjustable pulse width of nearly 0-100%. The generator is powered with a voltage of 5-15V and is therefore suitable for both TTL and CMOS circuits. If you want to measure the response of an amplifier or give timing pulses to a variable frequency digital circuit or drive a pulse width control circuit or if you just want to experiment, you may need a pulse generator.

Low Cost Pulse Generator circuit
Click here to download the full size of the above Circuit.

Dual timing circuit

The most important part of its circuitry is the integrated CMOS TLC556 that incorporates two integrated timing circuits. In the Figure, you see the general diagram of such an integrated and the pin assembly of the single 555 and the double 556.

The ICIA is connected as an unstable multivibrator and generates a square signal at its output (pin 5).

The frequency is given by the formula:

F = 1 / In2 • Cx (P1a + R1 + 2R2)

And depends on the placement of S1a and P1a. Thus, we have output frequencies of 1Hz (P1a = 1 MΩ, Cx = 1 μF) up to 100KHz (P1a = O, Cx = 100pF).

Each potentiometer implies a frequency variation in a logarithmic ten region. Each change in frequency also implies a change in pulse rate to pause. By shifting the potentiometer to its maximum resistance value, the pulse duration is extended to ten times while the pause duration remains unchanged. This is explained by the fact that the pulse duration depends on the relationship:

Cx (R1 + R2 + P1a) In2

And hence from the position of the potentiometer, while the pause duration is dependent on the Cx.R2 In2 relationship and is of course independent of P1a. If you connect the Threshold input via ground to S1a, the timeout is turned off.

To neutralize the effect of the frequency on the pulse / pause ratio of the output we still need a time which will be triggered by a rising edge at the spike 5. The chain of the gate N1-N3 delays and reverses the front Thus, at the entrances of N4 we can We have a high level only during the delay of the front through N1-N3 and thus only until the trigger pulse of LC b. In the drawing you can see the temporal correlation of the signals: The rising pulse front at N4 spike 13, the delayed and inverted front at spike 12 (waist) and the coincidence of the two signals that gives us the short trigger pulse at the spike 11 (below).

IC1B, unlike IC1A, is connected as a monostable multivibrator. The frequency of the output signal is only dependent on the frequency of the trigger pulse. While the pulse / pause ratio depends only on the position of the P2 rotor. However, via P1b, P3, R3 and C8-C12 a necessary limitation is imposed on the maximum pulse duration of the manostable multivibrator so that it never exceeds the P1α / C2-C6 time constant of IC1A. In the drawings you see square output signals with different pulse / pause ratios.



The construction is so simple that it can also be done on a perforated board if you do not want to design the printed one. If you do not make mistakes in the wiring, then the circuit can only work. With the oscilloscope you will set the P3 (P2 to its maximum value) so that the output pulse is just below the period at the IC1A output. This will make sure that IC1B is properly triggered

But add something for C2 and C8. If charging and discharging times are very small then we have an effect of the internal parasitic capacities of the integrated ones. To precisely observe the logarithmic tens of frequency, you must necessarily experiment by lowering the C2 and C8.

The pulse generator can be powered either by a 9V battery or by a fixed adjustable 5-15V power supply perhaps using an LM317. The circuit consumes approximately 0.3mA at 9V. The amplitude of the output signal is practically the same as the supply voltage of the pulse generator. So for TTL circuits you will feed with 5V while for CMOS circuits you will supply the generator with a voltage equal to the supply voltage of the integrated CMOS. The generator provides a maximum current of 10mA when the output level is high (logic 1) and can receive a current of 100mA when the output level is low (logic 0).


List of Components


  1. R1, R2 = 47KΩ
  2. R3 = 1KΩ
  3. P1 = 1MΩ stereo potentiometer
  4. P2 = 4M7 logarithmic potentiometer
  5. P3 = 250KΩ trimmer potentiometer


  1. C1, C5, C7, C11, C14 = 100n
  2. C2, C8 = 100p Styroflex
  3. C3, C9 = 1n
  4. C4, C10 = 10n;
  5. C6, C12, C13 = 1m MKT


  1. IC1 = TLC 556
  2. LC2 = 4011 or CD4011BE or HCF40118E


  • S1 = rotary switch 2x6
  • BNC plug
  • Single-pole switch

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