Posted on Oct 21, 2012

Q1 and Q2 form a differential stage which single- ends into the LT1010. The capacitively terminated feedback divider gives the circuit a de gain of 1, while allowing ac gains up to 10. Using a 20-fl bias resistor, the circuit delivers 1 V pk-pk into a typical 75-fl video load. For applications sensitive to NTSC requirements, dropping the bias resistor value will aid performance.

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At A ~ 2, the gain is within 0.5 dB to 10 MHz and the -3 dB point occurs at 16 MHz. At A ~ 10, the gain is flat, within ±0.5 dB to 4 MHz, and the -3 dB point occurs at 8 MHz. The peaking adjustment should be optimized under loaded output conditions.

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