An Overly Sensitive One-Shot


Posted on Feb 7, 2014

This circuit is from the data sheet for Linear Technology`s LT1720 (a 4. 5ns comparator). It`s the circuit entitled `Pulse Stretcher` at the very end. Essentially, it`s a one-shot with sensitivity down to 14mV for 5ns to 10ns inputs (i. e. , it doesn`t require a full swing from logical low to high as do most one-shots), and TTL logic level outputs. I


An Overly Sensitive One-Shot
Click here to download the full size of the above Circuit.

t also exhibits a mere 4. 5ns delay from input to output. Here`s an OrCAD schematic ( pdf ) used to simulate the circuit: The diode (D1) is a 1N5711. PSpice simulations indicate that it does indeed have the advertised sensitivity (I was able to get it to fire cleanly with a 5 ns 14mV pulse provided the input had 2ns rise and fall times). This is great. or so one would think. What the data sheet fails to mention is that this one-shot has a large recovery time (roughly 6 time constants), resulting in outputs of less than the desired time constant (1us for the above schematic) for any additional inputs arriving 1 to 7 time constants after the initial input. Discharging the timing capacitor (C7) with a FET switch reduces the recovery time substantially. Here`s an OrCAD schematic illustrating how one might do this ( pdf ): The FET used is a 2N7000. If one could turn this FET on for about 15ns using the falling edge of the circuit`s output, the recovery time is reduced to no more than 20ns. In the above schematic this is done artificially by injecting the desired "on pulse" into the FET`s gate at the appropriate time. Here`s a digital photo of a real version of the circuit: It doesn`t incorporate the FET switch (obviously), but otherwise follows the latter schematic. To improve the circuit`s stability I added a dc bias to the negative input of the lower comparator (U1), and increased the dc bias on the negative input of the upper...




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