By using a circuit built with a single analog multiplier and five precision resistors, an output voltage (Ko) can be made to create a second- order polynomial. The circuit implements the quadratic shown. The input terminals of IC1 are connected to create a positive square term and present the Vr signal to the output with a 1-10-V scale factor. Incorporating the voltage-divider network (resistors R3 and R4) in the input signal path provides additional attenuation adjustment for the coefficient (c) of the square term in the quadratic.
Then, the passive adder (resistors Rl, R2, and Ro) is wired to ICl`s internal summing circuit to generate the polynomial`s other two terms; the offset term (a) and the linear coefficient (b).