Photodiode-source-follower
A common method of transforming the output current of a photodiode into a voltage signal involves paralleling the photodiode with a high-value load resistor, which results in a nonlinear response. Additionally, the combination of the load's transresistance, Rr, and the photodiode's junction capacitance, C, slows the circuit's response time. Figure 67-11B illustrates nearly the same components as Figure 67-11A, rearranged to enhance the inherent speed and linearity of the photodiode. The SP4010, available from Hybrid Systems in Billerica, MA, is a unity voltage-gain buffer featuring a JFET input, a 60-MHz 3-dB bandwidth, and 18-bit, 0.0004% linearity over a ±10 V input range. In the circuit depicted in Figure 67-11B, the photodiode experiences a constant voltage across its terminals, which is crucial for achieving linear outputs. An optional zener diode, Dz, establishes a reverse bias at the photodiode to reduce junction capacitance and enhance speed. If Dz is not utilized, it is essential to connect the feedback loop. An optional diode, DcLAMP, limits the output in the event of unexpected light bursts, albeit resulting in increased dark-current leakage and decreased speed. The buffered output of the circuit is equal to the photodiode current multiplied by the transresistance, RT. Figure 67-11C displays the circuit's response to a rapid light pulse.
The described circuit effectively converts the output current from a photodiode into a voltage signal while addressing the challenges posed by nonlinearity and response time. By utilizing a high-value load resistor, the circuit initially suffers from a nonlinear response, which can be mitigated by employing a unity-gain buffer such as the SP4010. This buffer's JFET input and substantial bandwidth ensure that the signal integrity is maintained through the conversion process.
The arrangement of components in Figure 67-11B optimally positions the photodiode to experience a constant voltage, which is critical for maintaining a linear relationship between the input light intensity and the output voltage. The inclusion of the zener diode, Dz, serves a dual purpose: it provides reverse bias to the photodiode, thereby minimizing junction capacitance and enhancing the speed of response. In cases where the zener diode is omitted, the design necessitates a connected feedback loop to maintain proper circuit functionality.
Furthermore, the optional diode, DcLAMP, offers protection against sudden increases in light intensity by limiting the output. However, it is important to note that this protection comes at the cost of increased dark-current leakage and a reduction in the overall speed of the circuit’s response. The relationship between the output voltage and the photodiode current, governed by the transresistance RT, allows for precise control and measurement of the light signal.
Overall, this circuit design exemplifies a sophisticated approach to photodiode signal processing, balancing the need for linearity and response speed while providing options for protection against unforeseen conditions.A common method of transforming the output current of a photodiode into a voltage signal, paralleling the photodiode with a high-value load resistor, produces a nonlinear response. Also the combination of the load"s transresistance, Rr. and the photodiode"s junction capacitance, C" slows the circuit"s response time. Figure 67-11B shows virtually the same components as Fig. 67-llA rearranged to maximize the inherent speed and linearity of the photodiode. The SP4010 (available from Hybrid Systems, Billerica, MA) is a unity voltage-gain buffer with aJFET input, 60-MHz 3-dB bandwidth, and 18-bit, 0.0004%, linearity over a ±10 V input range. In the circuit of Fig. 67-11B, the photodiode sees a constant voltage across its terminals, which is essential for linear photodiode outputs.
The optional zener diode, Dz, sets a reverse bias at the photodiode for lower junction capacitance and higher speed. If you don"t use Dz, be sure to connect the feedback loop. An optional diode, DcLAMP. limits the output in case of unexpected light bursts, but results in increased dark-current leakage and lower speed.
The buffered output of the circuit equals the photodiode current times the transresistance, RT· Figure 67-llC shows the circuit"s response to a fast light pulse.
The described circuit effectively converts the output current from a photodiode into a voltage signal while addressing the challenges posed by nonlinearity and response time. By utilizing a high-value load resistor, the circuit initially suffers from a nonlinear response, which can be mitigated by employing a unity-gain buffer such as the SP4010. This buffer's JFET input and substantial bandwidth ensure that the signal integrity is maintained through the conversion process.
The arrangement of components in Figure 67-11B optimally positions the photodiode to experience a constant voltage, which is critical for maintaining a linear relationship between the input light intensity and the output voltage. The inclusion of the zener diode, Dz, serves a dual purpose: it provides reverse bias to the photodiode, thereby minimizing junction capacitance and enhancing the speed of response. In cases where the zener diode is omitted, the design necessitates a connected feedback loop to maintain proper circuit functionality.
Furthermore, the optional diode, DcLAMP, offers protection against sudden increases in light intensity by limiting the output. However, it is important to note that this protection comes at the cost of increased dark-current leakage and a reduction in the overall speed of the circuit’s response. The relationship between the output voltage and the photodiode current, governed by the transresistance RT, allows for precise control and measurement of the light signal.
Overall, this circuit design exemplifies a sophisticated approach to photodiode signal processing, balancing the need for linearity and response speed while providing options for protection against unforeseen conditions.A common method of transforming the output current of a photodiode into a voltage signal, paralleling the photodiode with a high-value load resistor, produces a nonlinear response. Also the combination of the load"s transresistance, Rr. and the photodiode"s junction capacitance, C" slows the circuit"s response time. Figure 67-11B shows virtually the same components as Fig. 67-llA rearranged to maximize the inherent speed and linearity of the photodiode. The SP4010 (available from Hybrid Systems, Billerica, MA) is a unity voltage-gain buffer with aJFET input, 60-MHz 3-dB bandwidth, and 18-bit, 0.0004%, linearity over a ±10 V input range. In the circuit of Fig. 67-11B, the photodiode sees a constant voltage across its terminals, which is essential for linear photodiode outputs.
The optional zener diode, Dz, sets a reverse bias at the photodiode for lower junction capacitance and higher speed. If you don"t use Dz, be sure to connect the feedback loop. An optional diode, DcLAMP. limits the output in case of unexpected light bursts, but results in increased dark-current leakage and lower speed.
The buffered output of the circuit equals the photodiode current times the transresistance, RT· Figure 67-llC shows the circuit"s response to a fast light pulse.