2N2222A Transistor

Posted on Feb 5, 2014

The first circuit, shown below, tests saturated turn-on time, while the second circuit tests saturated turn-off time for a 2N2222 transistor. Note that the first circuit schematic takes the output from the collector, which is pulled high to Vcc. While the second schematic takes its output from a resistor divider circuit. Also note that the bias vo

2N2222A Transistor
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ltage changes between the two schematics. The maximum Collector-to-Emitter voltage is 40 volts, but the circuit voltages uses 30 volts. Although there is no note in the schematic, use non-inductive resistors so the rise and fall times are not effected but the inductance of the resistors. The rise time (tr) of the applied pulse shall be = 2. 0 ns, duty cycle = 2 percent, and the generator source impedance shall be 50 Ohm. Sampling oscilloscope: ZIN = 100 k ohm, CIN = 12 pF, rise time = 5 ns. The output waveform is `rounded` because the transistor is in saturated. When a transistor is in saturated it takes longer for it to come out of saturation or switch. So a pulse edge applied to a transistor in saturation is slowed on the output, in this case inverted as well. The T-on time is the value being measured with this circuit. The pulse width is shortened or degraded as the rise and fall time is increased and invades the pulse width time. For a 2N2222 the input rise time should be set at less than or equal to 2nS. The pulse width is of less importance but remains as shown at 200nS. Note that although no power supply by-pass capacitors are shown, filtering capacitors should be used to filter noise from the supply during the test. Although the package type is of little importance for this test, the derating curves for the 2N2222 use a TO-18 Metal Can. The test circuit is some what generic, so basically any transistor could use the...

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