One KHz Synchronous Detector Circuit

Posted on Feb 6, 2014

This circuit employs a synchronous demodulator to separate a 1 KHz signal from noise and measures the amplitude with the 1 kHz signals when a 2nd at about 60 microvolts per count then sends the measurements via an RS-232 interface for further processing or exhibit. An LED about the board also lights when the measured signal exceeds a preset thresh

One KHz Synchronous Detector Circuit
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old. This experiment was began when I took an interest in getting ELF wireless signals. It also has applictions in optics and superior frequency RF, or for that matter, any place one wants to measure a small signal, of which the frequency and phase are recognized, in the presence of noise. Using the addition of the preamplifier according to the LM324, the sensitivity of this circuit was very easily extended to a sensitivity to 160 nanovolts per count. That an LM324 is utilized with little within the way of noise about the output testifies to the worth of employing this type of detector. The incoming signal is buffered by U2A (there is on U1 with this schematic as U1 was moved to a separate preamp assembly), which delivers a noniverted signal towards the integrator when U3A is switched on. U2B inverts the buffered signal from U2A and offers an inverted edition of the signal towards the integrator when U3B is switched on. To increase the charging fee, possibly reduce the 100k resistor around the input of U2C or decrease the. 047 uf integrating capacitor. The signals fed into the integrator charge the. 047 uf capacitor within the integrator. Right after 999 cycles with the 1 kHz sampling signal, U3C is turned on plus the capacitor is discharged with a continual current (one. 8V/7. 5K = 240 microamps), creating a linear positive-going ramp at five, 106 volts/second on the output of U2C. Though the output of U2 is ramping up...

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