home security system

The fundamental design of this project employs an Atmel AT89S8252-24PC Microcontroller, which features 2KB of EEPROM for runtime data storage. An ADC0838CCN analog-to-digital converter will be utilized to process up to eight inputs from sensor devices, including passive infrared sensors (PIRs) and reed switches. The choice of using an ADC over direct digital input (DIO) pins enhances security by allowing resistors to be connected in series, thereby setting the voltage to a specific level. This configuration enables the alarm system to detect any interruptions, such as wire cuts or shorts. To arm and disarm the system, an RFID tag reader will be employed instead of a keypad. The selected reader is an HYE-01 Series LF Reader, which supports both serial and Wiegand output; for this application, the Wiegand output will be utilized to maintain the serial connection for interfacing with a computer. The Wiegand protocol operates by producing a binary 0 when DATA0 is low and DATA1 is high, and a binary 1 when DATA0 is high and DATA1 is low, with both lines being high between bits. The final bit is recognized when both lines remain high for 50 milliseconds, necessitating the use of a timer to accurately detect this condition.

The circuit design integrates the Atmel AT89S8252-24PC microcontroller, which serves as the central processing unit for the system. This microcontroller is chosen for its sufficient EEPROM memory, allowing for temporary storage of sensor data and system states. The ADC0838CCN is connected to the microcontroller's analog input pins, enabling the conversion of analog signals from the sensors into digital data that the microcontroller can process.

In terms of security, the use of resistors in series with the sensors is a critical feature. This setup not only stabilizes the voltage levels but also provides a mechanism for fault detection. If an attempt is made to tamper with the wiring by cutting or shorting the sensor connections, the change in voltage levels will trigger an alarm condition.

The RFID system is an innovative approach to user authentication for arming and disarming the alarm. The HYE-01 Series LF Reader is interfaced with the microcontroller using the Wiegand protocol, which allows for efficient data transmission. The implementation of external interrupts (INT0 and INT1) is crucial for monitoring the Wiegand output lines. These interrupts are configured to trigger on the falling edge of the signals, enabling the microcontroller to accurately interpret the incoming data stream.

The timing mechanism for detecting the final bit of the Wiegand protocol is implemented using a timer module within the microcontroller. This ensures that the system can distinguish between the end of a data transmission and the start of a new one, maintaining the integrity of the data received.

Overall, this circuit design combines a microcontroller, ADC, and RFID technology to create a robust and secure alarm system capable of monitoring multiple sensor inputs while providing a user-friendly interface for system management.The basic design of this project will use a Atmel AT89S8252-24PC Microcontroller, since this micro has 2KB of EEPROM that can be used to store data during runtime. A ADC0838CCN analog to digital will be used to receive up to 8 inputs from sensor devices, such as PIR`s, reed switches, etc.

The reason behind using an ADC compared to just the DIO pin s is that it also adds some security by allowing resistors to be put inline to set the voltage to a specific level. If the wire to the sensor is cut or shorted, the alarm will be able to detect this occurring. To Arm/Disarm the system, an RFID tag reader will be used as apposed to a keypad. The chosen reader is a HYE-01 Series LF Reader that has both serial and Wiegand output. For this system the Wiegand output will be used to allow the serial connection to be used to connect to a computer.

When looking for information about the Wiegand protocol I found this page useful: The easy way of reading this data is to use the INT0 and INT1 external interrupts and configure them on the falling edge. This protocol works so that when DATA0 is low and DATA1 is high a 0 is produced and when DATA0 is high and DATA1 is low a 1 is produced.

In between bits both are high. The final bit is detected when both are high for 50ms, so a timer should also be used for detecting the final bit. 🔗 External reference