HM5164805 Series 64M-bit Dynamic RAM Technical Summary

Overview

The Hitachi HM5164805F and HM5165805F Series are high-performance 64M-bit dynamic RAMs organized as 8,388,608-word × 8-bit memory arrays. These devices leverage advanced CMOS process technology to achieve both high performance and low power consumption. The series features Extended Data Out (EDO) Page Mode for high-speed access operations, making them suitable for various memory-intensive applications. The devices are available in standard 32-pin plastic SOJ and 32-pin TSOP package options.

Key Features

• Memory Organization: 8,388,608 words × 8 bits (64M-bit)
• Power Supply: Single 3.3V ± 0.3V operation
• Access Time: 50ns/60ns maximum
• Power Dissipation:
  • Active Mode: 414mW/378mW max (HM5164805F Series), 486mW/414mW max (HM5165805F Series)
  • Standby Mode: 1.8mW max (CMOS interface), 1.1mW max (L-version)
• High-Speed Operation: EDO (Extended Data Out) Page Mode capability
• Refresh Modes:
  • RAS-only refresh
  • CAS-before-RAS refresh
  • Hidden refresh
  • Self refresh (L-version)
• Refresh Cycles:
  • RAS-only refresh: 8192 cycles/64ms (HM5164805F, HM5164805FL)
  • RAS-only refresh: 4096 cycles/64ms (HM5165805F, HM5165805FL)
  • CBR/Hidden refresh: 4096 cycles/64ms (all versions)
• Special Features: Battery backup operation (L-version)

Applications

The HM5164805F and HM5165805F Series DRAMs are designed for use in a wide range of electronic systems requiring high-density, low-power memory solutions:

• Desktop and portable computing systems
• Workstations and servers
• Networking equipment
• Telecommunications systems
• Embedded systems
• Industrial control systems
• Medical equipment
• Battery-powered devices (L-version)

Electrical Characteristics

Absolute Maximum Ratings

• Supply Voltage (VCC): -0.5V to +4.6V
• Input Voltage (VI): -0.5V to VCC + 0.5V
• Output Voltage (VO): -0.5V to VCC + 0.5V
• Operating Temperature: 0°C to +70°C
• Storage Temperature: -55°C to +125°C

Recommended Operating Conditions

• Supply Voltage (VCC): 3.3V ± 0.3V
• Input High Voltage (VIH): 2.0V min (VCC = 3.0V)
• Input Low Voltage (VIL): 0.8V max (VCC = 3.0V)
• Operating Temperature Range: 0°C to +70°C

DC Characteristics

• Input Leakage Current (II): ±1μA max
• Output Leakage Current (IOZ): ±1μA max
• Operating Current (ICC1): 126mA max (HM5164805F-50), 108mA max (HM5164805F-60)
• Standby Current (ICC2): 550μA max (CMOS level), 330μA max (L-version)

AC Characteristics

• Random Read Cycle Time (tRC): 110ns min (HM5164805F-50), 130ns min (HM5164805F-60)
• RAS Precharge Time (tRP): 50ns min
• CAS Pulse Width (tCAS): 25ns min
• Address Setup Time (tAS): 0ns min
• Address Hold Time (tAH): 10ns min
• Data Out Hold Time (tOH): 5ns min

Package Information

32-pin Plastic SOJ Package

• Package Code: PR-SOJ32-400B-1.27
• Dimensions: 10.16mm × 20.95mm (body)
• Pin Count: 32
• Pin Pitch: 1.27mm
• Package Weight: 0.8g typical

32-pin TSOP Package

• Package Code: PR-TSOP32-400B-0.8
• Dimensions: 8mm × 20mm (body)
• Pin Count: 32
• Pin Pitch: 0.8mm
• Package Weight: 0.3g typical

Ordering Information

The HM5164805 series is available in multiple variants with different speed grades and package options:

• HM5164805F-50: 50ns access time, standard version
• HM5164805F-60: 60ns access time, standard version
• HM5164805FL-50: 50ns access time, low-power version
• HM5164805FL-60: 60ns access time, low-power version
• HM5165805F-50: 50ns access time, alternate refresh version
• HM5165805F-60: 60ns access time, alternate refresh version
• HM5165805FL-50: 50ns access time, low-power alternate refresh version
• HM5165805FL-60: 60ns access time, low-power alternate refresh version

Functional Description

The HM5164805 series DRAMs feature a standard DRAM interface with multiplexed row and column addresses. The devices support four different refresh methods to accommodate various system requirements:

• RAS-only Refresh: Requires external counter for refresh address generation
• CAS-b