CSC400-Circuit Design

Posted on Feb 7, 2014

Create a new project by selecting the New Project option from the Getting Started menu or by selecting Select File > New Project. This brings up a Dialog box where you can enter the desired project name and location. Choose a meaningful name. You can also place optional comments for your project in the Description text box. Choose Schematic for th

CSC400-Circuit Design
Click here to download the full size of the above Circuit.

e Top-level source type. After clicking Next, select the proper Family, Device, Package, Speed, and Preferred Language for your project. For our CPLD, choose CoolRunner2 CPLDs for Family, XC2C256 for Device, TQ144 for Package, -7 for Speed, and Verilog for Preferred Language. Make sure the Enable Enhanced Design Summary box is checked. Finally, you should see the Project Summary. Make sure all settings are correct before clicking Finish (any modifications to the settings can be made by clicking the Back button. Double click on the new Schematic source that was just created. Under the Symbols tab, choose Logic for the Category. Using the available logic gates from the list, wire up a circuit following the logic equations for c and s from above. NOTE: Remember that everything is active low on the CoolRunner-II, so be sure to invert the inputs and the outputs to have the CPLD behave in the way that is described by the truth table. Add markers to indicate a, b, carry, and sum. To change the name of markers that are added, double-click on the marker. This brings up the Object Properties dialog box. Highlight Nets and change the Name attribute. The following is an example Schematic: To edit the. ucf file, select it in the Sources window, expand the User Constraints option in the Processes window below and double-click Edit Constraints (Text). A blank text editor should appear. Declare a net titled A and assign it to Pin 124....

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