Circuit explanation of PLL synthesizing oscillator

  
Inside:
Repository
To change the frequency of the output by the dividing ratio of the comparison frequency in the 10KHz unit, the dividing ratio is fixing on 1024 at the circuit this time. Because the 144-MHz bandwidth of the amateur radio is 2MHz(144. 0MHz to 146. 0MHz) in Japan, it makes the output frequency of the PLL 133. 3MHz to 135. 3MHz. (Frequency with the low o
Circuit explanation of PLL synthesizing oscillator - schematic

f 10. 7MHz) The oscillation frequency of the voltage controlled oscillator is controlled by the output of the PLL synthesizer and does the oscillation operation of the stable frequency. D1 and D2 are the variable capacitance diode (the varicap diode). The capacitance of the diode changes when gaining opposite direction voltage. The capacitance becomes small when making opposite direction voltage high. The signal for the control which is output from the charge pump of MC145163 is a pulse signal. A pulse signal is changed into the voltage change of the direct current through the filter by R4, R5, R6 and C6. The FET is an electric Field Effect-type Transistor. The output current (the drain electric current) can be controlled at the voltage which is gained by the input (the gate).



Leave Comment

characters left:

New Circuits

.