long delay timer schematics


Posted on Feb 7, 2014

This timer was designed mainly to switch off a portable radio after some time: in this way, one can fall asleep on the sand or on a hammock, resting assured that the receiver will switch off automatically after some time, saving battery costs. R1 and C1 provide a very long time constant. When P2 is momentarily closed, C1 discharges and the near ze


long delay timer schematics
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ro voltage at its positive lead is applied to the high impedance inputs of the four gates of IC1 wired in parallel. The four paralleled gate outputs of the IC go therefore to the high state and the battery voltage is available at Q1 Emitter. When P2 is released, C1 starts charging slowly through R1 and when the voltage at its positive lead has reached about half the battery voltage, the IC gate outputs fall to zero, stopping Q1. This transistor can directly drive a portable radio receiver or different devices drawing a current up to about 250mA. Connecting a Relay across the Emitter of Q1 and negative ground, devices requiring much higher voltage and current operation can be driven through its contacts. Pushing on P2 for 1 to 5 seconds, the circuit starts and then will switch off after about 35 minutes. This time delay can be varied by changing R1 and/or C1 values. P1 will stop the timer if required. A 4011 Quad 2 Input NAND Gate was used for IC1, but many other CMos gates or inverter arrays can be used in its place, e. g. 4001, 4002, 4025, 4012, 4023, 4049, 4069. With these devices, all inputs must be tied together and also all outputs, as shown in the Circuit diagram.




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