Posted on Apr 23, 2012

The purpose of D-type flip-flop IC2 is to synchronize the input signal with the clock pulse. When the clock pulse changes from low to high and the input is high, IC2 output is high. Subsequently, IC3 resets to zero and starts counting up. Until the counter counts to ten, the counter is inhibited. Thus, the number of pulses of the output of IC3 is ten times input pulse. The designed frequency of the clock pulse must be ten times higher than the maximum frequency of the input.

Click here to download the full size of the above Circuit.

IC4 and IC5 are cascaded to form a two decade programmable down counter. Since the number of pulses appearing at the input of the down counter is ten times the input to the divider, the effective range of the divisor for this divider is 0.1 to 9.9.

Leave Comment

characters left:

New Circuits



Popular Circuits

PC parallel port Null Printer Adapter
Luxeon Star LED driver with MAX1709 IC
Radar signal detector
Precision Audio-Frequency Generator Circuit
A Half Bridge Buck Boost Converter with high side N-type MOSFET
Mini Split Acs
Circuit Power audio Amplifier with TDA2030 2.1 Chanell 3 x 18 Watts Subwoofer Complete With PCB suggestion and power supply
Analogue Sound Preasure dB-Meter Circuit