pll fm circuit

The common characteristic of all previous low-power FM transmitters built over the decades is that their operating frequency is determined by an LC resonant circuit. Some of these transmitters exhibited excellent stability, while others did not; however, there has always been a desire to create one that is crystal-controlled. Various schemes have been considered over time, including the direct method of modulating the load capacitance of a crystal oscillator, a phase modulation scheme involving a phase shifter, balanced modulators, limiting amplifiers, and the straightforward approach of modulating a voltage-controlled oscillator (VCO) within a phase-locked loop (PLL). While browsing Digikey's online catalog, the LMX1601 frequency synthesizer chip was discovered, raising the possibility that the PLL approach could finally be realized. The LMX1601, designed for use in cell phones, includes everything necessary to create two phase-locked loops, except for the VCOs. Notably, one of the PLLs, specifically the "AUX" PLL, is specified to operate within the FM broadcast band. The LMX1600 and LMX1602 were also considered, but the LMX1601 was chosen due to its "500 MHz option," allowing it to function down to approximately 50 MHz. To operate, the LMX1601's registers must be loaded, particularly with the divide ratios for the reference and signal (VCO) counters, as well as control parameters. An Atmel AT90S2313 microcontroller was utilized to load the registers. This microcontroller could be any with three I/O pins, but the AVR processor was selected, with many AT90S2313 chips available from a previous project. The ATtiny2313 can be substituted without altering the source code. The 20-pin DIP appears significantly larger compared to the compact LMX1601, symbolizing the technological advancements over the decades since the introduction of these packages. The LMX1601 features a reference divider, used to reduce the 4 MHz clock from the microcontroller's crystal oscillator to a 12.5 kHz reference frequency. The feedback divider, referred to as the "16 Bit AUX N Counter" in the datasheet, is preceded by an 8 prescaler. These components determine the channel spacing for the phase-locked loop, calculated as 8 x 12.5 kHz = 100 kHz. The AUX N register contains the divide ratio for the feedback divider, and the PLL attempts to make the VCO operate at a frequency equal to the value written to the AUX N register multiplied by 100 kHz. The actual frequency of oscillation depends on the range of the VCO itself. This allows the center frequency of the resulting frequency-modulated oscillator to be set with 100 kHz resolution, enabling tuning to allocated FM broadcast channels worldwide. Writing a value of 1000 into the AUX N register prompts the PLL to target a frequency of 100 kHz x 1000 = 100 MHz. The firmware utilizes an 8-bit count as the "channel" number, with the highest frequency, occurring when the channel number is 255, set to 108 MHz by adding an offset of 825 to the channel number. This adjustment is made to avoid interference with aviation communications, which occupy the spectrum just above the FM broadcast band in most regions. When the frequency increment and decrement buttons are pressed, the channel number adjusts accordingly, with routines limiting the channel number to correspond to frequencies between 88.0 MHz and 108.0 MHz.

The design of this FM transmitter circuit incorporates several critical components to achieve its functionality. The LMX1601 frequency synthesizer chip serves as the core of the PLL system, ensuring accurate frequency generation. The microcontroller, AT90S2313, facilitates communication with the LMX1601, allowing for dynamic adjustments to the PLL parameters via software.

The circuit layout includes the necessary power supply filtering to ensure stable operation of both the microcontroller and the LMX1601. Bypass capacitors are placed close to the power pins of the LMX1601 to minimize noise and improve performance. The VCO, which is not part of the LMX1601, must be selected based on the desired frequency range and characteristics, ensuring it can operate effectively within the constraints set by the PLL.

The output stage of the transmitter typically includes a buffer amplifier to ensure that the output signal is strong enough for transmission. This stage must be designed to match the impedance of the antenna used, commonly 50 ohms, to maximize power transfer and minimize reflections.

Additionally, the firmware controlling the AT90S2313 is programmed to handle user inputs for frequency adjustments, providing a user-friendly interface for tuning. The design should also incorporate safety features, such as over-temperature protection and output power limiting, to prevent damage to the components and ensure compliance with regulatory standards for FM transmission.

In summary, this circuit design represents a comprehensive approach to building a crystal-controlled low-power FM transmitter, integrating advanced frequency synthesis techniques with user-friendly controls and robust output characteristics. The use of modern components, such as the LMX1601, alongside established microcontroller technology, exemplifies the evolution of FM transmission design, allowing for precise and reliable operation in the FM broadcast band.The common characteristic of all of the previous low power FM transmitters I`ve built over the decades, is that their operating frequency is determined by an LC resonant circuit. Some of them had excellent stability, some of them didn`t, but I had always wanted to make one that is crystal controlled. Various schemes had been considered from time-to-time, including the direct approach of modulating the load capacitance of a a crystal oscillator, a whimsical phase modulation scheme involving a phase shifter, some balanced modulators, and limiting amplifiers, and at times, the down-to-earth and sober approach of modulating a VCO within a phase locked loop (PLL).

While browsing Digikey`s online catalog, I found the LMX1601 frequency synthesizer chip and thought: "Just maybe, the PLL approach is finally within my grasp. " The LMX1601, which apparently was designed for use in cell phones, includes everything need to make two phase locked loops except for the VCOs.

More importantly, one of the PLLs, specifically the "AUX" PLL, is specified to work in the FM broadcast band. The LMX1600 and the LMX1602 were also considered, but the LMX1601 was selected because it has a "500 MHz option", meaning that it can work down to about 50 MHz.

In order to function, the LM1601`s registers need to be loaded. In particular, they need to be loaded with the divide ratios for the reference and signal (VCO in this case) counters, and to set some control parameters. To load the registers, I used a Atmel AT90S2313. It could have been any microcontroller with 3 I/O pins, but I had chosen the AVR processor, and I still have a lot of AT90S2313 chips left over from another project.

To the best of my knowledge, the ATtiny2313 can be substituted without changing the source code. The 20 pin DIP appears monstrously large compared to the diminutive LMX1601. The size difference is an indication of the passing of the three of four decades that elapsed between the introduction of these two packages. The LMX1601 has a reference divider, which I used to divide the 4 MHz clock from the micro controller`s crystal oscillator, down to 12.

5 kHz reference frequency. The feedback divider, referred to as "16 Bit AUX N Counter" in the data sheet, is proceeded by a divide by 8 prescaler. These factors determine the channel spacing for the phase locked loop. 8 X 12. 5 kHz = 100 kHz. The AUX N register contains the divide ratio for the feedback divider, and the phase locked loop tries to make the VCO operate at a frequency equal to the value written to the AXU N register, times 100 kHz.

I say "tries" because the actual frequency of oscillation depends on the range of the VCO itself. This means that the center requency of the resulting frequency modulated oscillator can be set with 100 kHz resolution, enabling it to be set either on or between allocated FM broadcast channels throughout most of the world. If a value of 1000 is written into the AUX N register, the PLL will try to run at 100 KHz X 1000 = 100 MHz.

The math isn`t so hard, and I skipped the hard math -the loop gain and bandwidth calculations- so this should be an easy project, mathwise. In the firmware, an 8 bit count is used as the " channel " number. The highest frequency, which occurs when the channel number is 255, is set to 108 MHz by adding an offset of 825 to the channel number.

I did this because the part of the spectrum just above the FM broadcast band is used for aviation communications in most, if not all, parts of the world. When the frequency increment and decrement buttons are pressed, the channel number increments or decrements, respectively.

The button increment and decrement routines that limit the channel number to those that correspond to frequencies between 88. 0 Mhz and 108. 0 MHz. 🔗 External reference