Precision peakvoltage detector

The circuit employs negative feedback exclusively for positive signals. The inverting input receives feedback only when diode D1 is forward biased, which occurs solely with positive input signals. As the positive input signal increases, the output of the operational amplifier (op amp) rises until the inverting input voltage matches the non-inverting input voltage. Consequently, capacitor C charges to this potential. When the input signal transitions to a negative value, diode D1 becomes reverse biased. The voltage across the capacitor remains, discharging slowly due to the op amp's input bias current of 10 picoamps. The discharge process is predominantly governed by resistor R, resulting in a time constant of 10 seconds. Therefore, the circuit effectively detects and retains the highest positive peak voltage.

The described circuit functions as a peak detector, utilizing an operational amplifier (op amp) in conjunction with a diode and a capacitor to capture and hold the maximum voltage level of a positive input signal. The operational amplifier is configured in a feedback arrangement that only activates during positive signal conditions, ensuring that the circuit remains responsive to peak positive voltages while ignoring negative inputs.

In this configuration, diode D1 plays a crucial role by allowing current to flow into the capacitor C when the input signal is positive. As the op amp amplifies the input signal, the inverting input is driven to the same potential as the non-inverting input, leading to the charging of capacitor C. The capacitor effectively stores the peak voltage, allowing the circuit to "remember" this value.

Upon the input signal transitioning to a negative voltage, diode D1 becomes reverse biased, preventing any discharge path through the diode. The voltage across capacitor C is maintained, but it will gradually decrease due to the op amp's input bias current, which is a very small leakage current of 10 picoamps. The discharge rate of the capacitor is primarily determined by the resistor R connected in parallel with the capacitor. The time constant, defined by the product of the resistance (R) and the capacitance (C), is set to 10 seconds, indicating how quickly the capacitor will discharge to approximately 63% of its stored voltage after the input signal drops.

This design enables the circuit to effectively track the peak voltage of a positive signal over time, making it suitable for applications where peak detection is essential, such as audio signal processing, analog-to-digital conversion, and various signal conditioning tasks. The combination of the op amp, diode, capacitor, and resistor forms a robust peak detection mechanism that can maintain the peak voltage for a significant duration, allowing for accurate monitoring and analysis of fluctuating signals.The circuit has negative feedback only for positive signals. The inverting input can only get some feedback when diode Dl is forward biased and only occurs when the input is positive. With a positive input signal, the output of the op amp rises until the inverting input signal reaches the same potential.

In so doing, the capacitor C is also charged to this potential When the input goes negative, the diode Dl becomes reverse biased, the voltage on the capacitor remains, being slowly discharged by the op amp input bias current of 10 pico amps. Thus the discharge of the capacitor is domin-antly controlled by the resistor R, giving a time constant of 10 seconds.

Thus, the circuit detects the most positive peak voltage and remembers it. 🔗 External reference