Digital Memories Tutorial



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⚛ Permanent Storage Memories ⚛ EPROM - EEPROM and NOR FLASH Memories ⚛ Dynamic RAM (DRAM)
⚛ Read-Only Memories Only ⚛ NAND FLASH Memory ⚛ Multi-Digit Memory Cells
⚛ Reprogrammed Memories ⚛ Random Access Memory (RAM) ⚛ FRAM memories
  ⚛ Static RAM (SRAM)  


This chapter looks at the different types of semiconductor memories that are used in modern computing systems to store processing data and program execution code.

The semiconductor memories that are commercially available are manufactured almost exclusively in MOS or CMOS technologies, while for special requirements only, bipolar contact transistors or other technologies are used.

For each type of memory it is possible to read the information it contains, while the possibility of recording new data separates the memory circuits into two categories: a) the read-write memories; and b) the read memories only.

Another feature of memory circuits is the ability to hold the contents of the memory when the power supply is interrupted. Based on this property, they are classified into permanent and non-permanent memories of data.

Figure 6-1 shows the typical structure of a memory circuit, as well as its various functional parts.

Typical internal memory organization


Figure 6-1


The information is stored in a memory cell array. Each 'cell' stores a bit using various technologies depending on the type of memory. Cells are usually arranged on a row of lines (X) and columns (Y). At each line and column junction there is a 'cell' of memory, which is connected to a vertical bitline (BL) and a horizontal wordline (WL). The digits are used to transfer data to and from the 'memory cells', while the word lines is for selecting the desired cell group from which the data is read or written.

During the initial read/write procedure, the selected BL lines are required to be loaded at a certain load. Special pre-charge circuits in the memory undertake this function.

During memory readout, the bit line load (BL) is detected and the result is converted to the corresponding binary number. Detection and conversion take on sense amplifiers, which are connected to the digital lines.

In its general form, each memory circuit receives as input a n-bit address and, depending on that address, selects a word m of digits from a set of 2n words. The set of words in the memory is stored in 2n x m 'memory cells, with each cell storing a bit. The number of data that can be stored is called memory size and measured in Kbytes or Mbytes.

The address of the word accessed in the memory is led to two decoders. A part of the address is entered into the line decoder X, which leads the word lines (WL). The remainder of the address is used in the column decoder Y, which controls via a Y-gating selector, which of the BL lines will eventually end up on the input/output lines of the memory.

Previous memory loops complement various latches, buffers, and memory function control circuits. These circuits control and synchronize all the internal processes that memory performs during read or write.

Every memory, in addition to its size, technology, and how it is interconnected in a computing system, is also characterized by the speed at which data is accessed:


  • • Access time determines how long the data will be available from the moment the system requests them from the memory.
  • • The cycle time is the minimum space required between successive accesses (reading or writing) in the memory. This time is longer than the access time.



Permanent Storage Memories

The non-volatile memories (NVMs) retain their contents even when the power supply voltage is cut off. Permanent storage is achieved in different ways, depending on the type of memory. Permanent storage memories display slow data recording times and are mainly used by applications that perform more (or only) readings than recordings.

Various kinds of permanent storage memories will then be examined, divided into two categories:


  • • Read-only memories-ROMs contain circuits that are programmed once, either at their manufacturing facility or later on special programming machines. These memories are not reprogrammed. This category includes ROM and PROM (programmable ROM).
  • • Reprogrammed memories store their data in a special design transistor. Special provisions within each memory allow reprogramming of the contents. This category examines EPROM (erasable-programmable ROM), EEPROM (electrically erasable-programmable ROM), NOR and NAND FLASH.



Read-Only Memories Only

ROM is a circuit that produces an output depending on the address at its input. The stored data (the output values) can not be changed and are predefined from the memory construction stage.

Memory circuits NOR-ROM and NAND-ROM


Figure 6-2


Figure 6-2 shows the two bit storage formats in a MOS ROM memory:

Figure 6-2a shows the internal structure of the memory array of a NOR type ROM. In the grid formed by horizontal word lines (WL) and with vertical line bars (BL), a bit is stored depending on whether or not there is a transistor at each cross between WL and BL.

To read a word, the WL line of the selected word is driven to a high potential while the remaining word lines are held at low potential. If there is a transistor at the junction of the selected line WL with a BL line, this conducts, so the BL line, which is initially connected to high potential via a pMOS transistor, is driven to a low potential. The absence of a transistor will leave the corresponding BL line at high potential.

Considering that the output of the memory is displayed in positive logic (like the BL lines) and according to the previous paragraph, the existence of a transistor between WL and BL gives the digit '0'. On the contrary, the absence of a transistor gives the digit '1'.

The connection of the transistors to each BL line is such that it is sufficient for one of them to conduct to lead BL to a low potential. This function is equivalent to that of a NOR logic gate, thus giving the same name to this ROM structure.

Figure 6-2b illustrates a different ROM structure called NAND ROM. Each digit line (BL) is at one end connected to the low potential and the transistors representing the bits are serially connected to each BL line. The transistors are controlled by the word lines (WL).

To read a word, all WL lines are driven to a high potential, except for the selected word line. In this way, all transistors of unselected words go. The WL line of the selected word is driven to a low potential, so each BL line will have at its top a) high potential if there is a transistor at its junction with the selected WL, or b) a low potential if there is no transistor in the corresponding position.

Considering that the output of the memory appears exactly as on the BL lines, a transistor is required at the BL and WL junction for the representation of the digit '1', while the absence of a transistor represents the digit '0'.

The serial connection of the transistors to each digit line is equivalent to a NAND logic gate: to drive a BL line at low potential is required to drive all line transistors. This correspondence also gives the name to this second ROM memory structure.

The information to be stored in a ROM memory defines a mask, according to which the integrated memory circuit is constructed, in the presence or absence of a transistor in the desired positions. As mentioned previously, the ROM memory data can not be changed. ROMs are used when copying large quantities (at least a thousand copies). Integrated circuits are ordered directly at the factory.

A variation of ROM is the PROM memory. A memory of this type is made by transistors at each intersection of the word (WL) and digit (BL) lines (see Figure 6-2a). Each transistor is connected via a fuse with the corresponding word line. Through special programming devices, an increased current is fed to selected transistors, resulting in the corresponding links being destroyed and these transistors isolated. In this way, the PROM memory is programmed to the desired content retrospectively, avoiding the ordering of a particular circuit at the factory.

ROMs and PROMs are produced in various sizes (from a few Kbytes to a few Mbytes) and achieve access times of 80 to 150ns. These memories have been virtually replaced by reprogrammable memories, which will be discussed in the next section. However, they are still used in special applications where maximum reliability is required in data storage, such as in military or space applications for resistance to environments with increased radiation. Also, for high-speed access requirements there are ROM and PROM memories built with bipolar transistor contact technology (BJT), which achieve access times of up to 15ns.



Reprogrammed Memories

The EPROM, EEPROM and FLASH memories can be programmed repeatedly so that new data is written to them each time. The circuits of this memory class are used to store each bit of the floating gate transistor, which is shown in Figure 6-3.

floating gate transistor


Figure 6-3


The unlinked gate is electrically isolated from any other contact of the transistor due to the surrounding insulating material (SiO2). The electron load to be placed on this gate is permanently maintained, regardless of the supply voltage.

The adding of a  load of electrons at the isolated gate is called "programming" of the transistor while electrons removal  is called "deleting". Electrons movement is accomplished by two alternative physical methods depending on the type of memory (Fowler-Nordheim (FN) tunneling and Channel Hot Electron (CHE) injection method). Both methods require high voltages (up to 20V), either externally supplied or internally generated by charge pumps.

The existence of the electron load on the isolated gate also determines the threshold voltage (VT), which has to be applied to the control gate so that the transistor will go:


  • • When the isolated gate has an electron load ("programmed" transistor) the VT increases, the transistor becomes more difficult and is detected as '0' (open switch).
  • • In the opposite case ("deleted" transistor) the VT decreases and the transistor is detected as '1' (closed switch).


By detecting the load of each transistor, the memory read function is performed. To write a new digit, it is first necessary to "delete" the corresponding transistor (reset to '1') and then, if we write '0', its 'programming'. Depending on the type of memory, each isolated gate transistor can be reprogrammed safely from 100,000 to 1,000,000 times.

The EPROM memories, which are the oldest type of technology, use the mechanisms mentioned only for the "programming" of the transistors. For "deletion", ultraviolet radiation is used, the energy of which can move the electrons away from the electrically isolated gate. This method has the disadvantage that:


  • a) a costly transparent window is required in the memory pack to pass the radiation and
  • b) the memory has to be removed from the system to be "deleted"


EEPROM memories and newer FLASHs use an electrical signal for both "programming" and "deleting" the transistors using FN or CHE methods.



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