Wireless Lan for AVR microcontrollers

The page is about equipping an Atmel AVR microcontroller based system with a Prism WLAN interface. This document is intended for people that already have experiences with the AVR microcontrollers and teaches them how to add a cheap but flexible WLAN interface to your AVR projects. At least two other approaches exist to accomplish this. Both of them are using the similar Prism chip based WLAN cards. But none of these projects is fully documented nor fully working. The approach being part of the Procyon AVRlib is a pure software solution. This means that the AVR does the entire compact flash communication timing in software. More: This is unfortunately slow, unreliable (due to an inexact timing) and consumes plenty of those precious IO ports on the AVR. Furthermore it lacks a description of the hardware needed. The second approach is a WLAN hardware add-on to the ethernut board. It uses PCMCIA WLAN card and an FPGA to achieve hardware supported reliable transfers, but the hardware is only partially documented and the entire project has been discontinued due to unsatisfying performance. Thus I decided to build my own system. I wanted it to be as small, simple and cheap as possible while leaving much of the AVR functionality for other use and allowing fast and reliable WLAN data transfers. The final design was based on a prism chipset based compact flash WLAN card which is connected to the AVR CPU using a programmable logic chip (CPLD) made by Xilinx. Since the CF card is attached to the AVR using the SPI interface the entire system is named the SPI2CF project. You can get the complete compact flash specification from the Compact Flash Association. The pros and cons of this solution presented here are: Pros: Reliable CF data transfers, Simple and easy SPI AVR interfacing, Fast transfers with low cpu impact, Homebrew friendly hard and software (all required tools are free of charge), Can be used for other compact flash cards as well, Support for uip TCP/IP stack. Cons: Requires the ability to flash a CPLD, Uses outdated WLAN hardware. Why not use an SD, USB or PCI card? There's a huge problem with WLAN: A lack of hardware documentation. A WLAN SDIO card would be great in conjunction with the AVR CPU. Although the SDIO standard comes under NDA and requires expensive licensing, the SPI related subset of SDIO is freely available. While this isn't the fastest way to access an SDIO card it's still fast enough for a simple AVR based system. Such a solution would only consume a few pins on the AVR and would allow for quite a nice hardware design making use of the AVRs built-in SPI capabilities. Unfortunately none of the WLAN SD card manufacturers I contacted were willing to provide the necessary information to do this. And without such documentation, the only way to do this would be massive reverse engineering which I wasn't willing to do. I am still interested in this. So if you can get detailed information on an SDIO WLAN card I am willing to try this. The documentation required is a detailed command description including the entire command set supported by such a card with a detailed description on how to use these commands to initialize the card and to send and receive data packets is required. Please don't ask me if I have gotten this information already. As soon as I get it I will state so here. Other interfaces like USB and PCI need very fast and complex interfacing and can't easily be attached to a small 8-bit AVR microcontroller. The CPLD based spi2cf chip makes sure that the SPI accesses cycles of the AVR are being translated into the correct CF timing. This is the main reason why CF cards driven by a pure software solution are often somewhat unreliable. These solutions cannot exactly meet the CF timing constraints when doing the necessary IO timing "manually" in software. The spi2cf CPLD circumvents such problems. The remaining parts are simple helper parts like the MAX232 level shifter required for a RS232 compliant serial interface and the 4053 multiplexor used to share some of the AVRs IO lines between the CPLD and the AVRs own programming interfaces. Power supply Prism WLAN cards usually require 3.3V for power supply. The XC9572 CPLD is available in two versions, the XC9572 runs at 5V, the XC9572XL at 3.3V. Finally the AVR ATmega32 is available in both, a 5V and a 3.3V version as well. It's therefore possible to build the entire system from 3.3V devices only. This has the small disadvantage that the 3.3V AVR CPUs cannot be clocked as high as their 5V counterparts. In order to run the AVR at e.g. 16MHz it must be powered at 5V. But the inputs of the 3.3V XC9572XL are 5V tolerant and the 5V AVR will accept 3.3V on its inputs. It's therefore possible to directly connect a AVR running 5V to a XC9572XL CPLD running at 3.3V. The CPLD thus works as a simple level shifter. The demo system uses this possibility and operated the CPU at 5V.

The described system integrates an Atmel AVR microcontroller with a Prism WLAN interface, designed to enhance AVR projects with a flexible and cost-effective wireless communication capability. The architecture primarily consists of a Prism chipset-based Compact Flash (CF) WLAN card interfaced with the AVR CPU through a Xilinx CPLD (Complex Programmable Logic Device). This design leverages the Serial Peripheral Interface (SPI) for communication, thus termed the SPI2CF project.

The CPLD plays a crucial role in managing the timing discrepancies inherent in software-based CF communication, which often leads to unreliable data transfers. By utilizing the CPLD, the system can achieve reliable CF data transfers while minimizing CPU load, thereby freeing up valuable I/O ports on the AVR. The CPLD is programmed to handle the SPI access cycles, ensuring they align with the CF timing requirements, which is a common challenge in purely software-driven solutions.

The system's design is further enhanced by the inclusion of supporting components such as the MAX232 level shifter, which facilitates RS232 serial communication, and a 4053 multiplexer that allows for the sharing of I/O lines between the CPLD and the AVR's programming interfaces. This modular approach not only simplifies the hardware design but also enhances the overall functionality of the AVR microcontroller.

Power considerations are also addressed, as the Prism WLAN cards typically operate at 3.3V. The XC9572 CPLD is available in both 5V and 3.3V variants, allowing for flexibility in system design. The AVR ATmega32 microcontroller is similarly available in both voltage levels, enabling the entire system to potentially operate at 3.3V, albeit with some limitations on clock speed compared to 5V operation. The design allows for a direct connection between a 5V AVR and a 3.3V CPLD, utilizing the CPLD as a level shifter, which is beneficial for maintaining compatibility across components.

This system stands out for its reliability, ease of integration, and compatibility with various CF cards, while also providing support for the uIP TCP/IP stack, making it suitable for a range of applications in embedded systems that require wireless communication. However, it is important to note the necessity for CPLD programming capabilities and the challenges posed by the use of outdated WLAN hardware.The page is about equipping an Atmel AVR microcontroller based system with a Prism WLAN interface. This document is intended for people that already have experiences with the AVR microcontrollers and teaches them how to add a cheap but flexible WLAN interface to your AVR projects. At least two other approaches exist to accomplish this. Both of them are using the similar Prism chip based WLAN cards. But none of these projects is fully documented nor fully working. The approach being part of the Procyon AVRlib is a pure software solution. This means that the AVR does the entire compact flash communication timing in software. This is unfortunately slow, unreliable (due to an inexact timing) and consumes plenty of those precious IO ports on the AVR. Furthermore it lacks a description of the hardware needed. The second approach is a WLAN hardware add-on to the ethernut board. It uses PCMCIA WLAN card and an FPGA to achieve hardware supported reliable transfers, but the hardware is only partially documented and the entire project has been discontinued due to unsatisfying performance.

Thus i decided to build my own system. I wanted it to be as small, simple and cheap as possible while leaving much of the AVR functionality for other use and allowing fast and reliable WLAN data transfers. The final design was based on a prism chipset based compact flash WLAN card which is connected to the AVR CPU using a programmable logic chip (CPLD) made by Xilinx.

Since the CF card is attached to the AVR using the SPI interface the entire system is named the SPI2CF project. You can get the complete compact flash specification from the Compact Flash Association. The pros and cons of this solution presented here are: Pros: Reliable CF data transfers Simple and easy SPI AVR interfacing Fast transfers with low cpu impact Homebrew friendly hard and software (all required tools are free of charge) Can be used for other compact flash cards as well Support for uip TCP/IP stack Cons: Requires the ability to flash a CPLD Uses outdated WLAN hardware Why not use an SD, USB or PCI card?

There's a huge problem with WLAN: A lack of hardware documentation. A WLAN SDIO card would be great inconjunction with the AVR CPU. Although the SDIO standard comes under NDA and requires expensive licensing, the SPI related subset of SDIO is freely available. While this isn't the fastest way to access an SDIO card it's still fast enough for a simple AVR based system.

Such a solution would only consume a few pins on the AVR and would allow for quite a nice hardware design making use of the AVRs built-in SPI capabilities. Unfortunately none of the WLAN SD card manufacturers i contacted were willing to privide the necessary information to do this.

And without such a documentation the only way to do this would be massive reverse engineering which i wasn't willing to do. I am still interested in this. So if you can get detailed information on an SDIO WLAN card i am willing to try this. The documentation required is a detailed command description incl. the entire command set supported by such a card with a detailed description on how to use these commands to initialize the card and to send and receive data packets is required.

Please don't ask me if i have gotten this information already. As soon as i get it i will state so here. Other interfaces like USB and PCI need very fast and complex interfacing and can't easily be attached to a small 8 bit AVR microcontroller. The CPLD based spi2cf chip makes sure that the SPI accesses cycles of the AVR are being translated into the correct CF timing.

This is the main reason why CF cards driven by a pure software solution are often somewhat unreliable. These solutions cannot exactly meet the CF timing constraints when doing the necessary IO timing "manually" in software.

The spi2cf CPLD circumvents such problems. The remaining parts are simple helper parts like the MAX232 level shifter required for a RS232 compliant serial interface and the 4053 multiplexor used to share some of the AVRs IO lines between the CPLD and the AVRs own programming interfaces. Power supply Prism WLAN cards usually require 3.3V for power supply. The XC9572 CPLD is available in two versions, the XC9572 runs at 5V, the XC9572XL at 3.3V. Finally the AVR ATmega32 is available in both, a 5V and a 3.3V version as well. It's therefore possible to build the entire system from 3.3V devices only. This has the small disadvantage that the 3.3V AVR CPUs cannot be clocked as high as their 5V counterparts.

In order to run the AVR at e.g. 16MHz it must be powered at 5V. But the inputs of the 3.3V XC9572XL are 5V tolerant and the 5V AVR will accept 3.3V on its inputs. It's therefore possible to directly connect a AVR running 5V to a XC9572XL CPLD running at 3.3V. The CPLD thus works as a simple level shifter. The demo system uses this possibility and operated the CPU at 5V. 🔗 External reference