Lights Out circuit

Posted on Feb 6, 2014

The design is based on the previous analysis of calculating the game in a circular shift register. While designing, it occurred to me that small extensions to the design would enable additional game play features, such as replay and manual input. The final design has the following features: The system clock is a low frequency relaxation oscillator

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with a `14 Schmitt trigger, running at about 13kHz. The frequency has been chosen to give a scan-cycle time of ~20ms for the keyboard scanner. The clock is combined with the first two stages of a `4040 and a `238 de-multiplexer into a phased clock signal (PHASE0, PHASE1 and PHASE2), which are guaranteed sequential, separated and non-overlapping. A phased clock assures that events can be timed precisely in sequence and prevents glitches from propagating (CPUs use a similar method internally too). The clock phase generation is coupled with the keyboard scanner (see below). The system is initialized by a common reset circuit setup using a RC charge time coupled to a `14 Schmitt trigger. When the power is turned on, the RC delay holds all important pins at the reset level (CLEAR signal) and thereby initializes the logic to start in a known situation. The reverse diode (D71) is connected to prevent any latch-up when power is `wonky` (input pins should never be allowed to be at a higher level than the power-supply). The board initialization for each new game is taken from an adjustable random generator. The source of random is a PN-junction in reverse (Q1 base-to-emitter). A high voltage applied at the PN-junction forces it into avalanche breakdown, but when this happens, the applied voltage is reduced through Q2 becoming active (the BE junction of a BC547B starts to break down between 7 and 8 Volts). The output of Q2 is...

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