SPDIF Monitor Circuit

Posted on Feb 4, 2014

The SPDIF monitor is one of the many applications possible with the digital audio interface receiver Type CS8412 from Crystal. Other applications described in earlier issues of this magazine dealt with the decoding of the S/PDIF (Sony/Philips Digital Interface Format) into data, bit clock and L/R clock in a digital voltmeter or clipping indicator.

SPDIF Monitor Circuit
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The addition of an external reference oscillator, IC4, enables the receiver to differentiate incoming signals by means of a frequency comparator and this is what the present monitor does. When the frequency of an incoming signal differs from a reference value, the difference is indicated in one of three ways: Clearly, the accuracy of the crystal oscillator determines the precision of these limits (the SG531P crystal from Epson used in the diagram has an accuracy of ±100 ppm). The optical input provided by IC2 is a useful addition. The output of this circuit is applied across R1 via C4, R3 and jumperJP1. The potential across R1 may also be used as a digital output, in which case the value of R3 needs to be adapted as necessary. The circuit may also be used as a kind of relay station or as a means for reducing jitter. For these purposes, IC1 is connected in a special mode (mode 13) when M3 is made 1, and M0 M2, 1, 0, and 1, respectively. When these levels are set the received S/PDIF data, including the preamble, is transferred directly to the output. The bit clock, SCK, then has a value twice as high as would be the case with coded data. It is possible to connect a TOSLINK module, or a coaxial output via a buffer (such as a number of parallel-linked 74HC04 inverters), to the SDATA output. A demultiplexer, that is, 3-to-8 line decoder IC3, is used to decode the data at F0 F2 to eight separate light-emitting diodes. Diode D9...

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