The AmG©lie project

Posted on Feb 6, 2014

However since the ROM is mapped in at &F000, this in binary is %1111 0000 0000 0000; or in other words when accessing the ROM, A12, A13, A14, and A15 will always be high. Thus, the I/O device selections will always be active at the same time as the ROM selection. Aaargh! The solution is pretty simple and would require only one more bit of logic to implement.

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But, it needs NOT so this would be another logic gate. I know I can do the entire memory decode with three logic ICs (anything else is just messy).

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