Simulate the electric field within a gas filled discharge gap generated by a radio frequency voltage generator. The circuit, provided to me by the experimenters somewhat far away, is given in the second picture below. (Numerical values: $C1 = 22 nF=2. 2cdot 10{-9}, R1 = 2 Om, L1+L2 = 8 mu H=8. 0cdot 10{-6},
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C2 = 3. 4n F=3. 4cdot 10{-9}$ [transformer parasitic capacitance]$, R2 = 100 MOm=108 Ohm, R3 = 1 Om, L3 = 100 nH=10{-7} H. $ Moreover, it`s running at 1MHz, sinusoidal, about $10kV$. ) $$=left(R_1+i omega (L_1+L_2)-ifrac{1}{omega C_1}
ight)+left(R_3+R_{Gap}+i omega L_3
ight)frac{1}{1+(i omega C_2)left(R_3+R_{Gap}+i omega L_3
ight)}$$ I have no idea if it`s of relevance, but I can post the text of the manual of the generator, which I also have, but which isn`t really written in my language. I have no idea how the picture even corresponds to the question above. The letter symbols seem a little off. So if the following doesn`t make any sense, then ignore it and just take the question above this at face value. "This generator simplified block diagram is presented on Fig. 5*` (the third picture). Clock signal generator, protect and control circuits are realized by using programmable logic device(PLD) Xilinx XCR32256XL. This chip configuration(and generation parameters) could be changed in-system by special JTAG (Joint Test Action Group)-programmer. Control signal are boosted by gate drivers and gone to the power switch gates. The converter is designed as half-bridge circuit using MOSFET(Metal-Oxide-Semiconductor Field Effect Transistor) switches and fed by voltage up to 400 VDC. Power oscillatory circuit, included elements C1 and high voltage step-up transformer having loss inductance L and parasitic capacitance C2, forms output...
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