Posted on Jan 10, 2013

A 1-V amplitude pulse triggers SCSl, but has insufficient amplitude to trigger SCS2. A 3-V input pulse is delayed in reaching SCSl by the 10-KO and .001-!`F integrating network. Instead, it triggers SCS2, then raises the common emitter voltage to prevent SCSI from triggering.

Click here to download the full size of the above Circuit.

The 100-KO resistors suppress the rate effect.

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