Data Transfer interface

  
The DS protocol was designed to provide firmware-based bidirectional host-to-slave inter processor communications for situations in which no hardware solution is available and the host and/or the slave in incapable of tending the interface in real time. The only specialized hardware required is two bidirectional I/O ports on each chip (alternatively two input ports and two tri-statable output ports may be used. In other words, it provides some of the functionalit of the Two-Wire-Interface (TWI, or I2C as named by Philips) where an actual TWI is not feasible in either hardware or firmware.
Data Transfer interface - schematic

The 5 volt power pin on the DS interface may be used to supply power to the DS device being tested. In this case, a power on-off switch would be a good idea. The microcontroller timing is unimportant for the DS device, but it is critical for the baud rate generator on the AT902313. The RS-232 inverters could also be Maxim MAX-232 or something similar. I prefer these discreet inverters because I am building them by hand and they take less board space than the DIP buffers. On the DS interface side, the firmware provides for week internal pullups on the Attention and Data lines, so no nexternal resistors are required unless there is a large capactive load on these lines, in which casce, resistors as low as 270 Ohms may be used.



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