Volt controlled

There was a bit of activity for my DC-DC voltage converters around the turn of 2001/2002. Several people built them and had problems. The basic problem with the DC-coupled arrangement I chose was that it is efficient, but if there is a single wiring error, then transistors burn and usually with a nice pyrotechnic display. Here is a simpler version that is much more forgiving and can be built in stages. I was prompted to build this circuit to power a DF96 valve (tube) radio from a 12v supply, so four PCBs have been drawn, each able to provide the following voltages.

The heart of the synthesizer is a set of 2 Analog Devices AD9850 direct digital synthesis (DDS) chips. These provide 2 channels of sinewave output which may differ in frequency and relative phase. The output stage of the synthesizer also includes separate variable attenuators for the 2 channels. These attenuators have a range of 0.0 - 63.9 dB of attenuation, in 0.1 dB steps. The user therefore has control over five parameters: 2 output frequencies, 2 output attenuations, and relative phase between the 2 channels.

The circuit in Figure 1 uses a Microchip 8-pin µC (PIC12C671) as a voltage-controlled oscillator (VCO). Because the PIC12C671 has an internal 4-MHz oscillator, four-channel 8-bit A/D converters, and built-in power-reset circuitry, you need no external components to configure the VCO. The µC reads two analog inputs through AN0 and AN1. The reference voltage for the A/D conversion is the µC's power supply VDD. The converted 8-bit data determines the duration of output high and output low. Assume, for example, the digitized outputs from AN0 and AN1 are 43 and 87, respectively. Timer 0 loads the 43 after the µC sets output GP2 to logic one. Timer 0 receives its timing from the internal clock.

By changing the supply voltage fed to a classic 4584 Schmitt trigger type oscillator, the oscillator frequency can be changed over a range of 50:1. A 74HCU04 inverter is used at the output of the 4584 to maintain a constant TTL logic level signal.

Modern set-top DBS TV tuners require high performance, broadband voltage control oscillator (VCO) designs at a competitive cost.To meet these goals, design engineers are challenged to create high performance, low-cost VCOs.

The oscillation frequency of the voltage controlled oscillator is controlled by the output of the PLL synthesizer and does the stable oscillation of 119.3 MHz.

If you need a clean emitter coupled logic (ECL) type signal between 200MHz and 400MHz this circuit works fine. It uses four voltage-controlled capacitors to change the frequency.

By changing the supply voltage fed to a classic 4584 Schmitt trigger type oscillator, the oscillator frequency can be changed over a range of 50:1. A 74HCU04 inverter is used at the output of the 4584 to maintain a constant TTL logic level signal.

The VFC (voltage-to-frequency-converter) circuit in Figure 1 achieves a wider dynamic range and a higher full-scale output frequency—100 MHz with 10% overrange to 110 MHz—by a factor of 10 over any commercially available converter.

The frequency comparator in Figure 1 uses two VCOs. C1, R1+R2, and the voltage at pin 9 determine the frequency of IC1 (900 Hz). C3, R5+R6, and the voltage at pin 9 determine the frequency of IC2 (1580 Hz). If fIN is lower than 900 Hz, then the output P2 of phase-comparator 2 in IC1 is high and drives the inhibit input of IC2 high via the R4-C2 lowpass filter. Consequently, the VCO in IC2 turns off. fIN is therefore higher than IC2's frequency (0 Hz), so the output P2 of phase-comparator 2 in IC2 goes low, pulling the output low via the R8-C4 lowpass filter.

The circuit in Figure 1 uses a Microchip 8-pin µC (PIC12C671) as a voltage-controlled oscillator (VCO). Because the PIC12C671 has an internal 4-MHz oscillator, four-channel 8-bit A/D converters, and built-in power-reset circuitry, you need no external components to configure the VCO. The µC reads two analog inputs through AN0 and AN1. The reference voltage for the A/D conversion is the µC's power supply VDD. The converted 8-bit data determines the duration of output high and output low.

The traditional frequency multiplier requires many elements: a phase comparator to detect the phase error between the input and the output signals, a lowpass filter to convert the phase error to a dc control signal, a VCO to generate the output, and a divider to set up the multiple ratio. The circuit in Figure 1 uses a different approach to multiply frequency with a programmable multiple ratio from 1 to 7 (Table 1).

A project required an inexpensive oscillator whose frequency increased step by step from 200 to 400 Hz and then decreased to 200 Hz. The first step was to design a VCO with a staircase driver. However, this approach entailed at least four ICs and many discrete components. An alternative method (Figure 1) requires only one 16-pin µC (an MC68HC705KJ1, costing less than $1) and only a few external components.

The aircraft communication in Sweden is still Amplitud Modulated (AM). The local airport (Axamo) use the frequency 118.250 MHz. The reveiver I will explain is a tunable AM-receiver for this frequency. The receiver is instead manually tunable with some 100kHz around the 118MHz. The output from the receiver is a low level output (100-200mV) so you must connect it to some kind of amplifier. I will not explain how to build an audio-amplifier. The hart of the receiver is the Voltage Controlled Oscillator (VCO).

The circuit in Figure 1 uses a Microchip 8-pin µC (PIC12C671) as a voltage-controlled oscillator (VCO). Because the PIC12C671 has an internal 4-MHz oscillator, four-channel 8-bit A/D converters, and built-in power-reset circuitry, you need no external components to configure the VCO. The µC reads two analog inputs through AN0 and AN1. The reference voltage for the A/D conversion is the µC's power supply VDD.

In theory, synchronous clock multiplication is an easy task. A simple PLL with two digital dividers—one inserted just after the VCO (voltage-controlled oscillator) and the second one placed directly at the input of the phase detector—may do the job. The flexibility of such a configuration allows for clock multiplication by any rational number.

A clock-recovery architecture can operate with NRZ digital signals, even at low SNRs. A clock-recovery subsystem is based on a PLL comprising a phase comparator, a loop filter, and a voltage-controlled oscillator (VCO).

PLLs are useful in a variety of applications, most notably cable and TV tuners. In these systems, the PLL synchronizes an output signal (typically from a VCO) with a reference or input signal, in frequency as well as in phase. The VCO in these PLLs requires a biasing circuit.

Using just four transistors and six resistors, this circuit provides switchable, constant-current drive for an LED and indicates both open- and short-circuit fault conditions (Figure 1). And there's a bonus, too. Control signal VCONT switches the LED on and off. When VCONT is high, Q1 and the LED are off. When VCONT is as low as 0V, Q1 turns on and sources a constant current to the LED. Because most LEDs have a forward-voltage drop of at least 1.2V, adequate base-bias voltage exists for Q3, which turns on, thereby providing a conduction path for Q2. This conduction, in turn, provides bias for Q4, which turns on and pulls high, thus indicating a healthy LED.

The circuit comprises simply the PWM source, capacitor C, and resistors RD and RW. For CMOS circuits, you calculate the open-circuit output voltage as VCONT=DΧVDD, where VCONT is the control circuit's output voltage, D is the PWM duty cycle, and VDD is the logic-supply voltage. The control circuit's output impedance is the sum of the resistor values RD and RW: RCONT=RD+RW. For the circuit of Figure 1, the output voltage, VOUT, is a function of the PWM average voltage, The PWM (pulse-width-modulation) output available from many microprocessors is based on an internal 8- or 16-bit counter and features a programmable duty cycle. It is suitable for adjusting the output of an LCD driver (Figure 1), a negative-voltage LCD driver (Figure 2), or a current-controlled LED driver (Figure 3).