An audio signal applied to VI is passed through the operational amplifier 741, U2. After being amplified, the output signal V2 is sampled and applied to a negative voltage doubler/rectifier circuit composed of diodes CR1 and CR2, along with capacitor C1. The resulting negative voltage is utilized as a control voltage, which is applied to the JFET 2N5457 (Q1). Capacitor C2 and resistor R2 form a filter for smoothing the rectified audio control voltage. The JFET is connected between pin 2 of the MC3340P, which is grounded by a 1 kΩ resistor. As the voltage applied to the gate of the JFET becomes more negative in magnitude, the channel resistance of the JFET increases, causing it to function as a voltage-controlled resistor. The MC3340P audio attenuator is the core component of the circuit. It is capable of providing 13 dB of gain or approximately -80 dB of attenuation, depending on the external resistor placed between pin 2 and ground. An increase in resistance results in a decrease in gain from the MC3340P. The gain of the circuit is not entirely a linear function of the external resistance, but the behavior is similar across much of the gain/attenuation range. An input signal applied to the AGC will cause the gate voltage of the JFET to become negative, thereby increasing the resistance of pin 2 to ground in the MC3340P and resulting in a reduction in gain. In this manner, the AGC output is maintained at a nearly constant level.
The circuit described operates as an automatic gain control (AGC) system, which is essential for maintaining a consistent audio output level in varying signal conditions. The operational amplifier (U2), specifically the 741 model, amplifies the incoming audio signal, which is then directed to a rectifier circuit comprised of diodes CR1 and CR2. This rectification process converts the AC audio signal into a negative DC voltage, which is critical for controlling the gate of the JFET (Q1).
Capacitor C1 plays a vital role in smoothing the rectified voltage, ensuring that the control voltage applied to the JFET is stable and free from high-frequency noise. The JFET operates as a variable resistor, with its resistance controlled by the gate voltage; as the negative voltage increases, the resistance of the JFET rises, effectively reducing the gain of the audio signal output from the MC3340P.
The MC3340P itself is a versatile audio attenuator that can adjust its gain based on the resistance connected to pin 2. The external resistor's value directly influences the gain, allowing for a range of adjustments from amplification to significant attenuation. The non-linear response of the gain relative to the external resistor is a characteristic feature of the circuit, which is common in many analog audio processing applications.
The combination of the JFET and the MC3340P ensures that the audio output remains consistent, even in the presence of fluctuating input signal levels. This AGC mechanism is crucial for applications such as broadcasting and audio recording, where maintaining a stable audio level is essential for quality sound reproduction. The design effectively integrates various components to achieve a reliable and efficient audio control system.An audio signal applied to VI is passed through the operational amplifier 741, U2. After being amplified, the output signal V2 is sampled and applied to a negative voltage doubler / rectifier circuit composed of diodes CRI and CR2, with the capacitor C1. The resulting negative voltage is used as a control voltage which is applied to the door] 2N54 85 FET Q1. Capacitor C2 and resistor R2 form a filter for smoothing the voltage rectified audio control. The lFET is connected between pin 2 of the MC3340P grounded by a resistor of 1 kohm. As the voltage applied to the gate of FET] becomes more negative in magnitude, the channel resistance of FET] increases causing lFET to function as a voltage-controlled resistor. The MC3340P audio attenuator is the heart of the MCO. It is capable of 13 dB of gain or almost - 80 dB of attenuation as a function of external resistor placed between Pin 2 and ground.
An increase in resistance decreases the gain from the MC3340P. The gain of the circuit is not entirely a linear function of the external resistance, but such behavior is similar across much of the gain / attenuation range. An input signal applied to the input of the AGC will cause the gate volt age the proportion lFET become negative.
Accordingly, the JFET increases the resistance of the pin 2 to ground the MC3340P causing a reduction in gain. In this way, the AGC output is kept almost constant. source by next. gr 🔗 External reference
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