For example, a 4.27V reference indicates a charging voltage of 427V since the capacitor voltage is sensed by a 100:1 resistive divider network. If the collector of Q4 is detached from the gates of Q1 and Q2, a maximum charging voltage of about 600V is achieved.
For the circuit in Fig. 1, R2 adjusts the duty cycle. C3 is composed of two photoflash capacitors (160µF/330V) in series, making C3 an 80µF/660V capacitor. It’s observed that the capacitor is charged faster when the duty cycle is higher. L1 is a handwound inductor around a ferrite core using three layers of 0.5mm magnet wire. Measured inductance of L1 is about 370µH.
The circuit in Fig. 1 has been improved by eliminating R2 and the new circuit is shown in Fig. 2. For this one, 555 output is ON for 130µs and OFF for 80µs. Thus the period and frequency are 210µs and 4762Hz, respectively.
This circuit can be used to charge a capacitor up to about 600 VDC for HV discharge experiments.
By 4beowulf7 - [email protected]