OSU8 Microprocessor Project (1994)

OSU8 began as a student project in 1994 to create a simple but functional 8-bit microprocessor, starting with a definition of the architecture to implementation in a Xilinx FPGA chip, and full-custom CMOS implementation. Over a period of about six months, the project came together and was, more or less, a success. The Xilinx-based hardware actually ran some code, but would crash after several dozen instructions. Gate-level simulation would run code correctly. Perhaps someday I will revisit the project and troubleshoot the real hardware, and maybe even fab the full-custom CMOS chip.

The OSU8 microprocessor project is an 8-bit architecture designed to fulfill basic computational tasks. The architecture is characterized by a simplified instruction set, allowing for easy implementation and testing. The initial phase of the project involved defining the architecture, which includes the data path, control logic, and memory management. The design was subsequently implemented using a Xilinx FPGA, which provided a flexible platform for hardware testing and validation.

The use of FPGA technology allowed for rapid prototyping and iterative testing. However, despite successful gate-level simulations, the Xilinx hardware encountered stability issues, crashing after executing a limited number of instructions. This indicates potential issues in the design, such as timing violations, inadequate signal integrity, or resource contention within the FPGA.

In addition to the FPGA implementation, there was an intention to develop a full-custom CMOS version of the OSU8 microprocessor. This would involve creating a dedicated silicon chip optimized for the specific architecture, potentially enhancing performance and reliability compared to the FPGA version. The transition from FPGA to CMOS fabrication would require a thorough understanding of VLSI design principles and access to semiconductor fabrication facilities.

Further development of the OSU8 microprocessor could focus on debugging the existing hardware to identify the root cause of the crashes and improving the design for CMOS implementation. This could include refining the instruction set, optimizing the data path, and enhancing the control logic to ensure reliable operation under various conditions.OSU8 began as a student project in 1994 to create a simple but functional 8-bit microprocessor, starting with a definition of the architecture to implementation in a Xilinx FPGA chip, and full-custom CMOS implementation. Over a period of about six months, the project came together and was, more or less, a success. The Xilinx-based hardware actually ran some code, but would crash after several dozen instructions. Gate-level simulation would run code correctly. Perhaps someday I`ll revisit the project and troubleshoot the real hardware, and maybe even fab the full-custom CMOS chip.

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