Voltage Doublers

21,902

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During the first half-cycle, Diode D1 conducts while Diode D2 is in the off state. Capacitor C1 charges to a peak voltage of 170 V, and Capacitor C2 discharges through the load resistor RL. In the second half-cycle, the input polarity reverses, placing both the input voltage and C1 in series, resulting in a peak voltage of 340 V. At this stage, D1 turns off and D2 conducts, causing the current to split between C2 and RL. This cycle continues to repeat. The configuration includes two half-wave rectifiers: one providing a positive output and the other a negative output, which together form a full-wave voltage doubler.

The described circuit operates as a voltage doubler utilizing two half-wave rectifiers. In the first half-cycle, when D1 is forward-biased, it allows current to flow, charging C1 to 170 V. This voltage is established due to the peak input voltage and the characteristics of the diodes. D2 remains off during this phase, preventing any current flow through its path. C2 discharges its stored energy through the load resistor RL, providing power to the load.

Upon entering the second half-cycle, the polarity of the input voltage reverses. This reversal places C1 in series with the input voltage, effectively doubling the voltage across the load. The total voltage seen by the load becomes 340 V at peak due to the additive nature of the series connection. In this phase, D1 becomes reverse-biased and ceases to conduct, while D2 turns on, allowing current to flow through it. The current now divides between C2 and the load resistor RL, with C2 continuing to supply energy to the load.

This arrangement of two half-wave rectifiers, one configured for positive output and the other for negative output, results in a full-wave voltage doubler. The output voltage is effectively doubled compared to the input voltage, making this circuit useful in applications where higher voltage levels are required from a lower voltage AC source. The continuous cycling of the diodes ensures that energy is efficiently transferred and stored, maximizing the output voltage available for the load. The design is particularly advantageous in power supply applications where compact size and high efficiency are desired. During the first half-cycle (Fig. 99-5(a)), Dl conducts, D2 cuts off, CI changes to 170 V peak, and C2 discharges through RL. For the second half-cycle (Fig. 99-5(b)), the input polarity is reversed, and both the input and CI are in series, which produces 340 V (peak). Now, Dl cuts off, while D2 conducts, and the current divides between C2 and Rl, the cycle then repeats.

Two Half-Wave Rectifiers, one with a positive output (Fig. 99-5(c)) and one negative (Fig. 99-5(d)), combine to make a full-wave voltage doubler (Fig. 99-5 (e)). 🔗 External reference