Implementation of Direct Output Buffers

  
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A total of six buffer circuits (using three dual op-amp packages), five for the input channels and one for the master output channel. (2) High input impedance (particularly for the five buffers tapping channel faders). (3) Low output impedance (<600 ohm), and stability when driving shielded cables of moderate length. (4) Use of op amps with low noise and distortion and wide
Implementation of Direct Output Buffers - schematic

bandwidth; use of low-noise metal film resistors throughout. (5) Nominal audio output levels compatible with today`s standard for ground-referenced audio lines, i. e. , -10 dBV (as typified by the Alesis ADAT recorder`s "unbalanced" inputs). (6) Unity voltage gain, and pads (voltage dividers) on inputs where appropriate. (7) Immunity of solid-state devices from damage caused by excessive input voltages. (8) Maintenance of consistent signal polarity from inputs to outputs. (9) All buffers must fit on a perf-board 2. 3 x 3. 7 inches in size, to be located above the chassis plane in a space formerly occupied by two filter capacitor cans. Figure 10 shows schematics of the four different buffer circuits that I settled on, and photos of their perf-board assembly installed in the MXM are shown in Figure 4. For polarity consistency (specification #8 above), all mic inputs must use today`s standard of XLR pin 2 as "hot" or "+" (where positive voltage swings are analogous to the compression part of a sound wave), with XLR pin 3 as the inverse; on the direct outputs, the signal polarity on the "tip" contact of the 1/4-inch jack should match that of pin 2 on the input XLR. With two stages of triode amplification, the Channel 1 preamp is a non-inverting amplifier, while each of the other input channels are inverting stages with their single pentodes. Thus, I chose a non-inverting output buffer design for Channel 1 and an inverting...



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