phase lock loop frequency synthesizer


Posted on Feb 7, 2014

Major role in the PLL phase detector is held by the duty comparing the input phase of the VCO signal with a reference signal and the output is a different phase. The existence of different phases will provide a further voltage difference, the difference voltage is filtered by the loop filter and applied to VCO. Then the control voltage to the VCOfrequency change towards minimize


phase lock loop frequency synthesizer
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the difference between a reference signal with a feedback signal from VCO. If the loop becomes locked, then control voltage in a position where the average frequency of feedback signal exactly equal to the frequency reference. The success of a PLL design is largely determined by the loop filter design good. This is because in the event of phase difference, phase detector, voltage differences will issue a change up and down. Loop filter must be able to hold sway voltage so that voltage changes into the VCO becomes smooth. various PLL can we make, but in this paper try asking a PLL design with a detailed circuit so that we can easily understand how it works. Although to fulfill that purpose is required of Actually PLL circuit can be made with a fairly simple example using IC type MC145106, MC145163, and so forth there are also many on the market. These type of IC has been able to perform the function is complete, with an IC is able to perform the functions of the TC9122, TC5081, TC5082 and TC4017. But the use of IC type is not discussed in this paper. In this paper proposed a PLL design with step 1 KHz fine equipped with an analog tuner with band width of 1 to 2 KHz to allow setting more precise operating frequency (less than 1 KHz). PLL is planned to be able to work from 13, 700 to 14, 699 MHz for use in transceiver with carrier oscillator or 10. 7 MHz SSB filter. Working frequency is set with three-digit thumb wheel such...




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