PRUBY Documentation

The PRUBY module provides a phase-locked loop (PLL) interface for rubidium frequency references, specifically the LPRO-101 and FRS-C products from EFRATOM Ball, Inc. This module conditions the 10 MHz signal from the reference and offers both a square wave reference output and a frequency-multiplied output. The multiplied output is phase-locked to the reference input and can be configured using on-board jumpers to achieve multiplication factors of 2, 2.5, 3, 3.33, and 4 times the reference input signal (e.g., 10 MHz). The module can also condition, lock, and multiply other input frequencies within its operational limits. The typical input voltage is 1 Volt peak-to-peak. Additional features include an on-board 3.3 Volt regulator for the PLL chip, a 3.3 Volt output, and a FET driver for an LED, which serves as a lock indicator. An on-board zener diode can be activated to accommodate higher power supply voltages, common with rubidium references. The module's design, construction, operation, and application focus on providing a PLL interface for rubidium frequency references. The primary function of the PRUBY is to condition the 10 MHz signal from a rubidium reference oscillator and deliver a frequency-multiplied output that remains locked to the reference. The module integrates a PLL chip and a voltage regulator that converts the input reference signal to a logic level and multiplies it based on jumper settings. The PLL multiplied output, typically at 25 MHz, serves as a stable phase-locked output referenced to the input source. While the PLL can be utilized for other signal conditioning and frequency multiplication applications, such uses are beyond the scope of this document. The schematic provides details on components, circuitry, and operational information for the module, including a table for PLL jumper options and bottom-side component placement for the PCB. A Parts List offers additional insights into the components used in the module assembly. Signal connections are facilitated through two single-row pin headers in a DIP format, with a 7-pin header on one edge and a 6-pin header on the opposite edge. The I/O connections are labeled "A" to "K" for straightforward reference. The header pins are spaced 0.1 inches apart, and the header rows are spaced 0.6 inches apart, allowing compatibility with in-line sockets or protoboard wiring. Some header pins are designated for clock multiplier selection, labeled "5" and "6" in correspondence with jumper pin pads located on the board's interior. The interior jumpers are marked "1", "2", "3", and "4" to differentiate them from I/O connections and link them to the labeled "5" and "6." The module incorporates a P-channel MOSFET that can be connected to drive an LED, indicating that the rubidium reference is locked. According to the schematic, the lock output from the rubidium reference connects to the MOSFET gate at module pin "F," also functionally identified as "BIT." The LED current-limiting resistor, R4, is situated on-board, as noted in the schematic's "BOTTOM PARTS PLACEMENT" section. This resistor is selected for a current of approximately 5 milliamperes; however, it can be replaced with an alternative value based on specific current requirements or output devices, using the parts placement diagram for guidance.

The PRUBY module is designed to ensure reliable operation with rubidium frequency references, providing a robust solution for applications that require precise frequency conditioning and multiplication. The integration of a PLL chip allows for stable output frequencies that are critical in various electronic systems, while the adjustable multiplier settings enable flexibility for different application needs. The inclusion of a voltage regulator and an LED indicator enhances usability, making the module well-suited for both prototyping and production environments. The design considerations, including the choice of components and layout, reflect a commitment to performance and reliability, ensuring that the PRUBY module meets the demands of high-precision frequency reference applications.The PRUBY module that provides a PLL interface for rubidium frequency references such as the LPRO-101 and FRS-C products manufactured by EFRATOM Ball, Inc. The module conditions the ten megahertz (MHz) signal from the reference and provides both a square wave reference output and a frequency-multiplied output.

The multiplied output is phase-locked to the reference input and can be set with on-board jumpers to 2, 2. 5, 3, 3. 33, and 4 times the reference input signal (e. g. , 10 MHz). The module can be used to condition, lock and multiply other input frequencies, provided that the module limits are met. Input voltages are typically 1 Volt Pk-Pk. Other module features include an on-board 3. 3 Volt regulator for the PLL chip, a 3. 3 Volt output and a FET driver for an LED (e. g. , for a lock indicator). An on-board zener diode can be enabled to support higher power supply voltages such as those typically available from rubidium references.

The following describes the design, construction, operation and use of a module that provides a PLL interface for a rubidium frequency reference (PRUBY). The primary use of PRUBY is to condition the ten megahertz (MHz) signal from a rubidium reference oscillator and provide a frequency-multiplied output that is locked to the reference.

The PRUBY module was designed for use with with the LPRO-101 and FRS-C rubidium frequency reference modules manufactured by EFRATOM Ball, Inc. The PRUBY module consists of a PLL chip and a voltage regulator that converts the input reference signal to a logic level and multiplies it according to on-board jumper settings.

The PLL multiplied output, typically 25 MHz, can be used as a stable phase-locked output that is referenced to the input source. The module`s PLL can be used for other applications requiring signal conditioning and frequency multiplication but this usage is outside the scope of this document.

The schematic shows the components, circuitry and some operational information for the module. For example, the schematic includes a table for PLL jumper options and bottom-side component placement for the PCB. The Parts List provides additional information about the components used to assemble the module. Signal connections are provided on two single row pin headers in a DIP format. A 7-pin header is located on one board edge and a 6-pin header on the other edge. The header I/O connections are labeled "A" to "K" for easy reference. Header pins are spaced one tenth of an inch apart and the header rows are spaced 0. 6 inch apart. This allows the module to be used with in-line sockets or wired on a protoboard. Some of the header pins are used to select clock multiplier options. These jumper connections are labeled "5" and "6" to correspond with jumper pin pads placed on the board interior.

The interior jumbpers are labeled "1", "2", "3" and "4" to distinguish them from I/O connections and correlate them to the connections labeled "5" and "6. " The module includes a P-channel MOSFET that can be wired to drive an LED to indicate that the rubidium reference is locked.

As shown in the schematic, the lock output from the rubidium reference connects to the MOSFET gate at module pin "F", which is also functionally labeled "BIT. " The LED current limiting resistor, R4, is located on-board, as indicated on the schematic in the "BOTTOM PARTS PLACEMENT" inset.

The limiting resistor was selected for a current of approximately 5 milliamperes. For different currents or output devices, R4 can be replaced using the parts placement diagram as a guide. 🔗 External reference