This circuit is specifically designed for individuals who frequently need to wake up early in the morning. Standard alarms in electronic watches are often insufficiently loud and frequently fail to wake users. The switch circuit described here will be useful; it can be utilized to activate a TV, radio, tape recorder, etc., ensuring that even the most reluctant individuals cannot ignore the sound for too long. Additionally, this time switch can be employed to turn on or off any other electrical or electronic device at any time. A simple analog electronic clock with an alarm function and a small circuit is required to implement the time switch. This time switch features two modes: a time-on mode and a time-off mode. In time-on mode, the alarm on the clock is set as usual, and at the designated time, this switch activates the device connected to output socket-1. In time-off mode, it deactivates the device at the set time. The optional output socket-2 is designed such that using this socket changes the mode without needing to toggle the mode switch (i.e., the mode switch can be omitted). The back panel diagram of a typical analog clock and the audio jack indicates how the existing buzzer of the clock should be connected to the clock's audio output. This connection ensures that when the plug is inserted into the audio jack, the clock's buzzer remains off, preventing unnecessary power consumption. The audio alarm output from the clock is linked to an audio frequency (AF) detector constructed around a low-power switching transistor, T1. During the alarm, the collector of transistor T1 fluctuates between ground level and Vcc. When there is no audio alarm input, the collector of transistor T1 maintains a Vcc potential. The following stage consists of an S-R latch built with NAND gates N1 and N2. Capacitor C2 and resistor R4 are employed for power-on reset. Upon powering the circuit, the output of gate N2 will be at logic 1 and that of gate N1 at logic 0, establishing the initial state regardless of the mode switch position. When the alarm triggers, point A connected to the collector of transistor T1 transitions to a logic 0 state, causing both gates' output logic states to toggle. Assuming the mode switch is set to the "Mode Off" position at power-on reset (with point D at logic 1), diode D1 will be in a blocking state, and transistor T2 will be forward biased through resistor R5 and diodes D2 and D3. Consequently, the relay is energized, providing output power at socket-1 while disconnecting it from socket-2. At alarm time, the audio signal toggles the logic output states of both gates N1 and N2, resulting in point D changing to a logic 0 state. Diode D1 conducts, lowering the voltage at the junction of diodes D1 and D2 to approximately 1 volt. Diode D3 ensures that its series combination with diode D2 places them in blocking mode. Meanwhile, capacitor C3 discharges through resistor R6, causing the voltage at the base of transistor T2 to approach ground level, which turns off transistor T2 and de-energizes relay RL1. Consequently, power at output socket-1 is cut off while it is redirected to socket-2. If this operation is repeated with switch S1 in the "Mode On" position, power will initially not be available at socket-1 (but will be available at socket-2). However, after the alarm, power will become available at socket-1 while being cut off from socket-2.
This circuit design incorporates various electronic components to create a reliable alarm system that can control the operation of multiple devices based on a preset time. The use of NAND gates for the S-R latch allows for stable toggling between the two modes, ensuring that the user can easily switch between activating and deactivating their devices. The incorporation of diodes protects the circuit from back EMF generated by the relay, while the transistors serve as efficient switches, minimizing power loss during operation. This design is particularly useful in scenarios where traditional alarm systems may fall short, providing a robust solution for waking users effectively.This circuit is especially designed for those who often need to wake up early in the morning. Ordinary alarms in electronic watches are not loud enough and very often they fail to wake up. The switch circuit described here will come handy; it can be used to switch on a TV, radio or tape recorder etc, which will not allow even the laziest amongst u s to ignore their sound for too long. Besides, this time switch can also be used to switch on/off any other electric or electronic gadget at any time. What you need is a simple analogue electronic clock with alarm facility and a small circuit to implement the time switch.
This time switch has two modes. One is time-on` mode and the other is time-off ` mode. In time-on mode, you set up the alarm in your clock as per normal procedure and at the set time this switch turns on the gadget connected at the output socket-1. In time-off mode, it turns your gadget off at the set time. The optional output socket-2 is wired in such a way that when you use this socket, the mode changes without having to flip the mode switch (i.
e. mode switch can be omitted). Please refer to the back panel diagram of a typical analogue clock and the audio jack, to see how the existing buzzer of the clock is required to be wired to the audio output from the clock. This will ensure that when plug is inserted in the audio jack, the clock`s buzzer will remain off and not consume any power unnecessarily.
The audio alarm output from the clock is coupled to the AF detector built around low-power switching transistor T1. During alarm, the collector of transistor T1 will fluctuate around ground level and Vcc. During absence of audio alarm input, the collector of transistor T1 is held at Vcc potential. The next stage consists of an S-R latch built around NAND gates N1 and N2. Capacitor C2 and resistor R4 are used for power-on-reset. On switching the power supply, gate N2 output will acquire logic 1 and that of gate N1 logic 0. This is the initial state, irrespective of the position of mode switch. At the time of alarm, when point A connected to collector of transistor T1 passes through logic 0 state, the output logic state of both the gates will toggle.
Assuming that mode switch is flipped to Mode Off` position at power-on-reset (when point D is at logic 1), initially diode D1 would be in blocking state and transistor T2 would be forward biased via resistor R5 and diodes D2 and D3. As a result, the relay is in energised state, which makes output power available at output socket1 and cuts it off from socket-2.
At alarm time, the audio signal toggles logic output states of both gates N1 and N2. As a result, point D goes to logic 0 state. Diode D1 conducts, taking the voltage at junction of diodes D1 and D2 to near about 1 volt. Diode D3 ensures that its series combination with diode D2 puts them in blocking mode. Capacitor C3 meanwhile discharges via resistor R6 and the voltage at base of transistor T2 approaches towards ground level, cutting off transistor T2 and de-energising relay RL1. Now the power at output socket-1 would be cut off while it becomes available in socket-2. If the above operation is repeated with switch S1 in Mode On, ` the power would initially not be available in socket-1 (but available in socket-2).
But after the alarm, the power would become available in socket-1 and not in socket-2. 🔗 External reference
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