building synchronous clock

Quartz clocks have dominated timekeeping for the past 20 years but have a cumulative error that can become significant over time. While crystal frequency adjustments can correct some errors, regular resetting is often necessary. In contrast, mains-powered synchronous clocks maintain accuracy through the 50Hz mains distribution system, though they can fail during blackouts. This circuit converts a quartz clock to synchronous mains operation, ensuring at least one clock in the home remains accurate. To begin, obtain a quartz clock movement and disassemble it down to the printed circuit board (PCB). For detailed instructions, refer to the article titled "Fast Clock For Railway Modellers" in the December 1996 issue of SILICON CHIP. Next, isolate the two wires connected to the clock coil and solder light-duty insulated hookup wires to them. Drill a small hole in the clock case to pass the wires through, then reassemble the clock. To test the movement, connect the wires to an AA cell, reversing them to ensure the clock's second hand advances with each connection. The circuit uses a low voltage AC plug pack, with its AC output directed to two bridge rectifiers: BR1 supplies DC power, and BR2 generates positive-going pulses at 100Hz which are fed to IC1a, a 4093 NAND Schmitt trigger. IC1a squares the 100Hz pulses and sends them to the clock input of cascaded 4017 decade counters. The output at pin 12 of IC3 produces a 1Hz signal, which is fed to IC4, a 4013 D-type flip-flop. This configuration allows its outputs at pins 12 and 13 to each go high for one second. Since these pulses are too long to drive the clock movement directly, they are fed to 4093 NAND gates IC1b and IC1c, where they are gated with the signal from pin 3 of IC4. This results in short pulses from pins 3 and 10 of IC1, which drive the clock through a limiting resistor R1. The value of R1 should be selected through testing to ensure it allows sufficient current to reliably drive the clock movement.

The proposed circuit effectively transforms a standard quartz clock into a synchronous clock that relies on the mains frequency, thereby improving accuracy over time. The use of a low-voltage AC plug pack as the power source ensures safety and compatibility with household electrical systems. The integration of bridge rectifiers allows the conversion of AC to DC for powering the circuit while simultaneously generating the necessary timing pulses for clock operation.

The 4093 NAND Schmitt trigger serves a crucial role in shaping the 100Hz signal into a square wave, which is essential for precise timing applications. The cascaded 4017 decade counters further divide the frequency down to a 1Hz signal, suitable for driving the clock mechanism. The 4013 D-type flip-flop is utilized to create timed outputs that can be manipulated to produce the required short pulses for the clock movement, ensuring that the clock's second hand moves accurately without being overloaded.

The addition of limiting resistor R1 is critical to prevent excessive current from damaging the clock movement. Careful selection of this resistor should be based on empirical testing to ensure optimal performance. This design not only enhances the reliability of the clock but also provides an interesting project for electronics enthusiasts looking to repurpose quartz clock movements into more accurate timekeeping devices.The quartz clocks which have dominated time-keeping for the past 20 years or so have one problem: their errors, although slight, are cumulative. After running for several months the errors can be significant. Sometimes you can correct these if you can slightly tweak the crystal frequency but otherwise you are forced to reset the clock at regular i

ntervals. By contrast, mains-powered synchronous clocks are kept accurate by the 50Hz mains distribution system and they are very reliable, except of course, when a blackout occurs. This circuit converts a quartz clock to synchronous mains operation, so that you can have at least one clock in your home which shows the time.

First, you need to obtain a quartz clock movement and disassemble it down to the PC board. For instructions on how to do this, see the article on a "Fast Clock For Railway Modellers" in the December 1996 issue of SILICON CHIP. Then isolate the two wires to the clock coil and solder two light duty insulated hookup wires to them (eg, two strands of rainbow cable).

Drill a small hole in the clock case and pass the wires through them. Then reassemble the clock case. To test the movement, touch the wires to the terminals of an AA cell, then reverse the wires and touch the cell terminals again. The clock second hand should advance on each connection. The circuit is driven by a low voltage AC plug pack. Its AC output is fed to two bridge rectifiers: BR1 provides the DC supply while BR2 provides positive-going pulses at 100Hz to IC1a, a 4093 NAND Schmitt trigger.

IC1a squares up the 100Hz pulses and feeds them to the clock input of the cascaded 4017 decade counters. The output at pin 12 of IC3 is 1Hz. This is fed to IC4, a 4013 D-type flipflop, which is connected so that its two outputs at pins 12 & 13 each go positive for one second at a time.

As these pulses are too long to drive the clock movement directly, the outputs are each fed to 4093 NAND gates IC1b & IC1c where they are gated with the pin 3 signal to IC4. This results in short pulses from pins 3 & 10 of IC1 which drives the clock via limiting resistor R1.

The value of R1 should be selected on test, allowing just enough current to reliably drive the clock movement. 🔗 External reference