The dual slope-sampling solar engine

The dual slope-sampling solar engine. Yet another interesting design from the fertile mind of Wilf Rigter. If you had time to experiment with the ALF type SE circuit you may have discovered some of its shortcomings with regard to a Power Smart Head adaptation. The problem is that HCMOS gates are power hungry when used as SE voltage comparators when the analog input voltage is near the CMOS switching threshold. If an HCMOS gate is used without sampling, the chip supply current can be as high as 70mA with the comparator input voltage near the trigger threshold (Vcc / 2).

The dual slope-sampling solar engine is a sophisticated circuit design that enhances the efficiency of solar energy systems. This design is particularly notable for its ability to mitigate the power consumption issues associated with HCMOS gates, especially when used as voltage comparators. The circuit operates by utilizing a dual slope integration method, which allows it to effectively sample and process the solar input voltage over a defined time interval.

The key feature of this circuit is its ability to minimize the power drain during operation. By employing a sampling technique, the circuit can maintain low power consumption even when the analog input voltage approaches the CMOS switching threshold. This is crucial for applications where battery life or energy efficiency is a concern. The dual slope method involves integrating the input voltage over time, which helps in achieving a more stable and accurate output while reducing the current spikes that typically occur with continuous HCMOS gate operation.

The design incorporates a comparator that activates only during the sampling phase, significantly lowering the average current draw. In scenarios where the comparator input voltage is close to Vcc / 2, the circuit can maintain a supply current well below the 70mA threshold, thus enhancing the overall efficiency of the solar engine. This makes it a suitable choice for applications requiring prolonged operation on limited power resources, such as remote sensors or energy harvesting devices.

Overall, the dual slope-sampling solar engine represents a significant advancement in solar energy circuit design, addressing the challenges posed by traditional HCMOS implementations and providing a robust solution for efficient energy management.The dual slope-sampling solar engine. Yet another interesting design from the fertile mind of Wilf Rigter If you had time to experiment with the ALF type SE circuit you may have discovered some of its shortcomings with regard to a Power Smart Head adaptation. The problem is that HCMOS gates are power hungry when used as SE voltage comparators when the analog input voltage is near the CMOS switching threshold.

If an HCMOS gate is used without sampling, the chip supply current can be as high as 70mA with the comparator input voltage near the trigger threshold (Vcc / 2). 🔗 External reference