jung schematic
The reference selected is an LM329 sub-surface (or buried) zener (ZD1). While the circuit symbol resembles that of a zener diode, it functions as an active device, resulting in a significantly lower dynamic impedance of approximately 1 ohm compared to a conventional zener. Additionally, it exhibits low noise relative to its nominal output voltage of 6.95V, attributable to the sub-surface zener configuration. Other devices may be utilized based on the desired output voltage and noise performance. This zener is biased through a resistor (R5); however, it is important to note that the bias voltage is sourced from the regulator's positive sense point or output, which represents the quietest positive rail within the system. This method of biasing the device effectively isolates the reference from noise effects at the regulator input, thereby benefiting from a super-regulator effect. The reference output is subsequently filtered through a simple RC network (R7/C4). The resistor values are selected to ensure that the error amplifier (IC2 or IC3) inputs receive a low and matched source impedance of 500 ohms, which optimizes DC stability and dynamic performance while minimizing susceptibility to electromagnetic compatibility (EMC) issues. C4 is a high-performance, low equivalent series resistance (ESR) capacitor designed to enhance filtering from the low impedances employed. The use of low impedance components reduces the inherent noise from the resistors (Johnson noise) and mitigates the impact of electromagnetic interference (EMI) on the circuit. Diodes D3 and D4 provide protection against excess differential mode voltage at the op-amp inputs. Although they are not strictly necessary for the AD797 op-amp and can be omitted for slight performance improvement due to the internal inclusion of these diodes in the AD797, their presence is beneficial for many other op-amps. The reference voltage at the op-amp input is compared to a fraction of the output voltage through the +VSENSE and 0VSENSE inputs via a potential divider (R8/R9). The +VSENSE and 0VSENSE can be directly connected to the relevant regulator outputs or to the load (remote sensing), which enhances performance by ensuring that the regulator's efficacy is not degraded by the finite impedance of interconnecting wiring. The ratio of these two resistors determines the output voltage, and the combined parallel impedance of these resistors should be 500 ohms for optimal dynamic and DC stability. To minimize noise amplification by the gain of the error amplifier, the noise gain is reduced to unity at high frequencies through the addition of a bypass capacitor (C7). This capacitor is matched in value and type to C4 to equalize AC impedances at the error amplifier inputs, thereby enhancing dynamic performance. The error amplifier derives its power from the regulator output (bootstrapping), which significantly improves performance and is a fundamental aspect of the design. As the power supply rejection ratio (PSRR) of the error amplifier diminishes with increasing frequency, the performance of the regulator typically suffers. This connection scheme dramatically enhances the error amplifier's performance, yielding significant frequency-dependent improvements in the regulator's performance parameters, particularly in terms of line rejection. Careful consideration of the start-up process is necessary, as it influences the final topology selected and is discussed in greater detail later. The output of the regulator is provided by the series pass device (Q1), controlled by an LED-biased current source (T1/R1/D1/R4). Upon switching on, the current source supplies current to the base of Q1, turning it on and causing the output voltage to rise. This action powers the error amplifier and reference, which subsequently regulates the output voltage by sinking current (via T2/R6/D2) away from the base until equilibrium is reached at the correct output voltage. The level shift zener diode (D2) is a crucial component in the start-up process, ensuring that sufficient current is available at the base of Q1 even if the error amplifier activates under low-output conditions.
The circuit utilizes the LM329 zener diode as a precision voltage reference, taking advantage of its low dynamic impedance to maintain stability in the output voltage. The biasing strategy employed ensures that the voltage reference remains stable and unaffected by noise, enhancing the overall performance of the circuit. The RC filtering network is critical in smoothing out any fluctuations in the reference output, while the selected components are chosen for their optimal performance characteristics. The design also incorporates protective diodes to safeguard the op-amp inputs, reflecting a comprehensive approach to circuit robustness. By employing remote sensing techniques, the circuit improves regulation accuracy, particularly in applications where wiring resistance could otherwise introduce significant errors. The integration of a bypass capacitor further enhances the stability and performance of the error amplifier, ensuring that noise does not adversely affect the output. The power supply arrangement for the error amplifier is particularly innovative, allowing for enhanced PSRR and overall circuit performance. The start-up sequence is meticulously designed to ensure reliable operation from the moment power is applied, highlighting the importance of each component in achieving a stable and efficient voltage regulation system.The reference chosen is an LM329 sub-surface (or buried) zener (ZD1). Whilst the circuit symbol is that of a zener, it`s actually an active device, which results in much lower dynamic impedance than a normal zener, of around 1ohm. It also has low noise relative to it`s output voltage (6. 95V nom. ), due to the sub-surface zener reference. Other devi ces can be used, depending upon desired output voltage / noise performance. This Zener is biased through a resistor (R5). Note though that the bias voltage is from the regulator +ve sense point, or output, which is the quietest +ve rail of the system. Biasing the device in this manner means that the reference is well isolated from the effects of noise at the regulator input, in effect benefiting from a super-reg to itself!
The output of the reference is then filtered, via a simple RC network (R7 / C4). The resistor values are chosen so that the error amplifier (IC2 or IC3) inputs see a low, and matched source impedance of 500 Ohms, thereby facilitating optimum DC stability and dynamic performance and minimising EMC susceptibility. C4 is a very high performance, low E. S. R. device in order to maximise the filtering effect from the low impedances used. The low impedances bring benefits in terms of reducing the inherent noise of the resistors (Johnson noise) and reducing the effects of EMC / EMI on the circuit.
D3 and D4 provide protection against excess differential mode voltage at the op-amp inputs. They are not strictly necessary for the AD797 op-amp, and can be left out for some very minor performance improvement, since the AD797 incorporates these diodes internally. This not the case for many other op-amps though. The reference voltage at the input of the op-amp is compared to a proportion of the output voltage, via the +VSENSE and 0VSENSE inputs and a potential divider (R8 / R9).
+VSENSE / 0VSENSE can be connected directly to the relevant regulator outputs, or to the load (Remote Sensing), thereby improving performance by ensuring the regulator performance is not degraded by the interconnecting wiring`s finite impedance. The ratio of these two resistors sets the output voltage, and the combined parallel impedance of these two values should be 500 Ohms, for optimum dynamic and DC stability.
To prevent noise being amplified by the gain of the error amplifier, the noise gain is reduced to unity at high frequencies, by the addition of a bypass capacitor (C7). This is matched in value and type to C4, in order to equalize AC impedances at the error amp inputs, thereby improving dynamic performance.
The error amplifier also obtains its power from the regulator output (bootstrapping), this brings major performance improvements, and is a fundamental feature of the design. As the error amplifier PSRR (Power Supply Rejection Ratio) degrades, with increasing frequency, the regulator performance will normally suffer.
This connection scheme augments the error amplifier performance dramatically, giving a significant, frequency-dependant, improvement in the regulator performance parameters. In particular line rejection is enhanced significantly. Start-up needs careful consideration though, and is covered in more detail later and helps dictate final topology chosen.
The output of the regulator is from the series pass device (Q1). This is controlled from an LED-biased current source (T1 / R1 / D1 / R4). At switch on the current source provides current to Q1 base, which turns it on causing the output voltage to rise. This applies power to the error amplifier and reference, which then starts to control the output voltage, by sinking current (via T2 / R6 / D2) away from the base, reaching equilibrium when the correct output voltage is achieved.
The level shift Zener diode (D2) is an essential part of the start-up process, ensuring that if the error amp comes on in a low-output condition there is still enough current available at Q1 base 🔗 External reference
The circuit utilizes the LM329 zener diode as a precision voltage reference, taking advantage of its low dynamic impedance to maintain stability in the output voltage. The biasing strategy employed ensures that the voltage reference remains stable and unaffected by noise, enhancing the overall performance of the circuit. The RC filtering network is critical in smoothing out any fluctuations in the reference output, while the selected components are chosen for their optimal performance characteristics. The design also incorporates protective diodes to safeguard the op-amp inputs, reflecting a comprehensive approach to circuit robustness. By employing remote sensing techniques, the circuit improves regulation accuracy, particularly in applications where wiring resistance could otherwise introduce significant errors. The integration of a bypass capacitor further enhances the stability and performance of the error amplifier, ensuring that noise does not adversely affect the output. The power supply arrangement for the error amplifier is particularly innovative, allowing for enhanced PSRR and overall circuit performance. The start-up sequence is meticulously designed to ensure reliable operation from the moment power is applied, highlighting the importance of each component in achieving a stable and efficient voltage regulation system.The reference chosen is an LM329 sub-surface (or buried) zener (ZD1). Whilst the circuit symbol is that of a zener, it`s actually an active device, which results in much lower dynamic impedance than a normal zener, of around 1ohm. It also has low noise relative to it`s output voltage (6. 95V nom. ), due to the sub-surface zener reference. Other devi ces can be used, depending upon desired output voltage / noise performance. This Zener is biased through a resistor (R5). Note though that the bias voltage is from the regulator +ve sense point, or output, which is the quietest +ve rail of the system. Biasing the device in this manner means that the reference is well isolated from the effects of noise at the regulator input, in effect benefiting from a super-reg to itself!
The output of the reference is then filtered, via a simple RC network (R7 / C4). The resistor values are chosen so that the error amplifier (IC2 or IC3) inputs see a low, and matched source impedance of 500 Ohms, thereby facilitating optimum DC stability and dynamic performance and minimising EMC susceptibility. C4 is a very high performance, low E. S. R. device in order to maximise the filtering effect from the low impedances used. The low impedances bring benefits in terms of reducing the inherent noise of the resistors (Johnson noise) and reducing the effects of EMC / EMI on the circuit.
D3 and D4 provide protection against excess differential mode voltage at the op-amp inputs. They are not strictly necessary for the AD797 op-amp, and can be left out for some very minor performance improvement, since the AD797 incorporates these diodes internally. This not the case for many other op-amps though. The reference voltage at the input of the op-amp is compared to a proportion of the output voltage, via the +VSENSE and 0VSENSE inputs and a potential divider (R8 / R9).
+VSENSE / 0VSENSE can be connected directly to the relevant regulator outputs, or to the load (Remote Sensing), thereby improving performance by ensuring the regulator performance is not degraded by the interconnecting wiring`s finite impedance. The ratio of these two resistors sets the output voltage, and the combined parallel impedance of these two values should be 500 Ohms, for optimum dynamic and DC stability.
To prevent noise being amplified by the gain of the error amplifier, the noise gain is reduced to unity at high frequencies, by the addition of a bypass capacitor (C7). This is matched in value and type to C4, in order to equalize AC impedances at the error amp inputs, thereby improving dynamic performance.
The error amplifier also obtains its power from the regulator output (bootstrapping), this brings major performance improvements, and is a fundamental feature of the design. As the error amplifier PSRR (Power Supply Rejection Ratio) degrades, with increasing frequency, the regulator performance will normally suffer.
This connection scheme augments the error amplifier performance dramatically, giving a significant, frequency-dependant, improvement in the regulator performance parameters. In particular line rejection is enhanced significantly. Start-up needs careful consideration though, and is covered in more detail later and helps dictate final topology chosen.
The output of the regulator is from the series pass device (Q1). This is controlled from an LED-biased current source (T1 / R1 / D1 / R4). At switch on the current source provides current to Q1 base, which turns it on causing the output voltage to rise. This applies power to the error amplifier and reference, which then starts to control the output voltage, by sinking current (via T2 / R6 / D2) away from the base, reaching equilibrium when the correct output voltage is achieved.
The level shift Zener diode (D2) is an essential part of the start-up process, ensuring that if the error amp comes on in a low-output condition there is still enough current available at Q1 base 🔗 External reference
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