A phase-locked loop or phase lock loop (PLL) is a control system that tries to generate an output signal whose phase is related to the phase of the input "reference" signal. It is an electronic circuit consisting of a variable frequency oscillator and a phase detector. This circuit compares the phase of the input signal with the phase of the signal derived from its output oscillator and adjusts the frequency of its oscillator to keep the phases matched. The signal from the phase detector is used to control the oscillator in a feedback loop.
Phase-locked loops are widely used in radio, telecommunications, computers and other electronic applications. They may generate stable frequencies, recover a signal from a noisy communication channel, or distribute clock timing pulses in digital logic designs such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a hertz up to many gigahertz.
There are several variations of PLLs. Some terms that are used are analog phase-locked loop (APLL) also referred to as a linear phase-locked loop (LPLL), digital phase-locked loop (DPLL), all digital phase-locked loop (ADPLL), and software phase-locked loop (SPLL).
Analog or Linear PLL (LPLL)
Phase detector is an analog multiplier. Loop filter is active or passive. Uses a Voltage-controlled oscillator (VCO).
Digital PLL (DPLL)
An analog PLL with a digital phase detector (such as XOR, edge-trigger JK, phase frequency detector). May have digital divider in the loop.
All digital PLL (ADPLL)
Phase detector, filter and oscillator are digital. Uses a numerically-controlled oscillator (NCO).
Software PLL (SPLL)
Functional blocks are implemented by software rather than specialized hardware.
Stereo PLL FM transmitter
This is the latest BH1417 FM Transmitter design from RHOM that includes a lot of features in one small package. It comes with pre-emphasis, limiter so that the music can be transmitted at the same audio level, stereo encoder for stereo transmission, low pass filter that blocks any audio signals above 15KHz to prevent any RF interference, PLL circuit that provides rock solid frequency transmission (no more frequency drift), FM oscillator and RF output buffer. There are 14.....
Views: 2790 | Votes: 59 | Comments: 0 | Rating: 3 | Rank: 0 | Added: Mar 12, 2013 |
FM PLL transmitter 88-108MHz with PIC16F870
This transmitter is PLL controlled and the frequency is very stable and can be programmed digitally. The transmitter will work from 88 to 108 MHz and the output power is up to 500mW. With minor changes the frequency can be set from 50 to 150 MHz. The main oscillator is based around the transistor T1. This oscillator is called Colpitts oscillator and it is voltage controlled to achieve FM (frequency modulation) and PLL control. T1 should be a HF transistor to work well, but.....
Views: 3961 | Votes: 104 | Comments: 0 | Rating: 2 | Rank: 0 | Added: Feb 8, 2013 |
Two gates and a microprocessor form digital PLL
You can use Microchip`s low-cost PIC16F818 microprocessor and a pair of gates to construct a digital PLL that can clean noisy digital signals over a range of 4 to 40 kHz. Featuring programmable lock range, phase differential, and loop gain, the digital-PLL engine and lock detector can extract clock and data information from noisy, short-range radio signals (Figure 1). When you construct it using a QFN-packaged microprocessor and discrete single-gate logic devices, the.....
Views: 3037 | Votes: 63 | Comments: 0 | Rating: 9 | Rank: 0 | Added: Jan 28, 2013 |
The MC13136 circuit is not easy to find so I have replaced it with a new receiver circuit called SA615.
This is a basic FM receiver with very good performance and sensitivity.
In my super receiver I used a DDS to fine tune the receiver, but in this project
I replaced it with a PLL synthesizer. I have decided the oscillator frequency of the FM receiver to be 38.9MHz.
See figure at right. This FM receiver has an IF frequency of 455kHz and that means it will receive RF.....
Views: 4263 | Votes: 81 | Comments: 0 | Rating: 8 | Rank: 0 | Added: Dec 4, 2012 |
200mW FM transmitter
Here is the latest and greatly improved TX200 VFO/VCO FM transmitter. The most versatile transmitter to date that can be turned into high fidelity stereo PLL based 200mW FM transmitter. It is a perfect circuit for transmitting your music around the house and yard. TX200 uses only two coils; one in the oscillator and the other one in the 200mW VHF amplifier so it should be fairly easy for anyone to build. It also includes built-in pre-emphasis and C5 for enhanced sound.....
Views: 5761 | Votes: 72 | Comments: 0 | Rating: 5 | Rank: 0 | Added: Nov 21, 2012 |
Circuit allows high-speed clock multiplication
In theory, synchronous clock multiplication is an easy task. A simple PLL with two digital dividersone inserted just after the VCO (voltage-controlled oscillator) and the second one placed directly at the input of the phase detectormay do the job. The flexibility of such a configuration allows for clock multiplication by any rational number...
Views: 4583 | Votes: 3 | Comments: 0 | Rating: 1 | Rank: 0 | Added: Oct 31, 2012 |
pulse width to voltage converter
The circuit in Figure 1 stems from a radio-controlled modeling application, which requires a voltage proportional to the width of the incoming servo pulses. The circuit is optimized for a positive-going pulse width of 1 to 2 msec, repeating at intervals of approximately 17 msec. The output produces a voltage of 0.95V for a 1-msec pulse to 2.25V for a 2-msec pulse. The circuit operates similarly to a PLL, but it locks onto the pulse width, rather than to the frequency, of.....
Views: 2612 | Votes: 14 | Comments: 0 | Rating: 6 | Rank: 0 | Added: Oct 15, 2012 |
TDA1591 PLL stereo decoder
The TDA1591 is a monolithic bipolar integrated circuit
providing the stereo decoder function and noise blanking
for FM car radio applications...
Views: 1669 | Votes: 18 | Comments: 0 | Rating: 8 | Rank: 0 | Added: Oct 2, 2012 |
PLL implements FPGA-based SDRAM controller
As FPGA capabilities increase and time to market decreases, FPGAs gain more acceptance for implementing both data and control paths. Thus, they find wide use as controllers and datapath glue logic for fast-page DRAMs. Synchronous DRAMs (SDRAMs), whose control signals use a clock input as reference, are a natural target for FPGA-based controllers. SDRAMs operate at frequencies of 100 MHz and higher (in contrast with fast-page DRAMs, for which a 60-MHz memory-system clock.....
Views: 2320 | Votes: 108 | Comments: 0 | Rating: 1 | Rank: 0 | Added: Sep 27, 2012 |
Video Operated Relay
Many Video Operated Relay (VOR) circuits have been published in recent years for use in connection with ATV repeater controllers or automatic videotape logging systems. Unfortunately, many of these circuits fail to properly detect certain video signals depending on their signal-to-noise ratio or their picture content. Most designs rely on using an LM567 phase locked loop (PLL) tone decoder chip to detect the presence of horizontal sync energy in a composite video signal,.....
Views: 111 | Votes: 39 | Comments: 0 | Rating: 8 | Rank: 0 | Added: Sep 16, 2012 |
Low-cost circuit biases VCOs for cable and TV
PLLs are useful in a variety of applications, most notably cable and TV tuners. In these systems, the PLL synchronizes an output signal (typically from a VCO) with a reference or input signal, in frequency as well as in phase. The VCO in these PLLs requires a biasing circuit...
Views: 1008 | Votes: 105 | Comments: 0 | Rating: 7 | Rank: 0 | Added: Sep 13, 2012 |
PLL implements FPGA-based SDRAM controller
As FPGA capabilities increase and time to market decreases, FPGAs gain more acceptance for implementing both data and control paths. Thus, they find wide use as controllers and datapath glue logic for fast-page DRAMs. Synchronous DRAMs (SDRAMs), whose control signals use a clock input as reference, are a natural target for FPGA-based controllers...
Views: 1096 | Votes: 6 | Comments: 0 | Rating: 5 | Rank: 0 | Added: Sep 3, 2012 |
Tanktwanger circuit puts a new spin on clock synthesis
When you think of clock synthesis, you typically think of simple digital division or a PLL. However, using a wire delay line and an unusual circuit known as a "tanktwanger," you can produce a clock generator with numerous advantages, including phase that is continuously variable...
Views: 1275 | Votes: 84 | Comments: 0 | Rating: 5 | Rank: 0 | Added: Aug 18, 2012 |
Ballast Control IC Design
The IRPLLNR2 is a high efficiency, high power factor, fixed output
electronic ballast designed for driving rapid start fluorescent lamp types. The design contains an EMI
filter, active power factor correction and a ballast control circuit using the IR21571. This demo board is
intended to ease the evaluation of the IR21571 Ballast Control IC, demonstrate PCB layout techniques
and serve as an aid in the development of production ballasts using the International Rectifier.....
Views: 1284 | Votes: 50 | Comments: 0 | Rating: 4 | Rank: 0 | Added: Aug 6, 2012 |
FM PLL controlled VCO
The main oscillator is printed in blue and is voltage controlled.
In this construction the VCO range is 88 to 108 MHz. As you can see from the blue arrows, some energy goes to an amplifier and some energy goes to the PLL unit. You can also see that the PLL can control the frequency of the VCO. What the PLL do is that it compare the VCO frequency with the reference frequency (which is very stable) and then regulated the VCO voltage to lock the oscillator at desired.....
Views: 2801 | Votes: 6 | Comments: 0 | Rating: 4 | Rank: 0 | Added: Aug 6, 2012 |
FM PLL transmitter
This new FM transmitter is very easy to make and doesn't need any RF tuning. First of all ,we have used an integrated VCO: The POS150 from Mini-circuits. This excellent RF circuit covers all the FM Band in a voltage range of 4V to 8V. The Kvco factor is very stable all over the FM band, consequently, we have applied the AF signal directly on the control voltage line coming from the PLL. A 4dB attenuator allows the VCO to drive the MSA1105 RF power stage without exceeding.....
Views: 5251 | Votes: 40 | Comments: 0 | Rating: 3 | Rank: 0 | Added: Jul 25, 2012 |
PLL 41MHz reciever with 68HC711D3
The quartz QZ1 of the preceding receivers which set the work frequency is not on the market any more. It is replaced
by a locking phase loop allowing the free choice of an unspecified frequency on the band used, either the 41, or the 72 MHz. The step between channels is 5 kHz, giving us 101 frequencies in 72 MHz and 41 in 41 MHz. In practice, the RX19 " scans " on the 2 frequencies chosen by the user. The first is called a Normal Frequency (Fn) and he other, a Safety.....
Views: 5530 | Votes: 34 | Comments: 0 | Rating: 9 | Rank: 0 | Added: Jul 15, 2012 |
PLL block contains a phase detector, a charge pump, a loop filter, and voltage controlled oscillator circuit. VCO is the major part of PLL circuit and it affects the system performance in terms of ...
A simple PLL FM demodulator circuit using IC XR2212 is shown here. XR2212 is a highly stable, monolithic PLL (phase locked loop) IC specifically designed for communication and control system applic...
The circuit shown here is of a good Stereo FM transmitter that can transmit high quality signals up to a range of 70 feet. The circuit is based on BH1417 PLL stereo transmitter IC from Rhom semicon...
As a debut article, I'd like to share about one of the problems solved on a PLL circuit and problems when the product transferred to production calibration. Without revealing too many details due t...
Transmitter power amplifier, the output signal from BH1415F by 2 SC9018, 2SC3355, 2SC2053 amplified signal can reach more than 500 mW, adjusting well to achieve greater power. Measured by the pull ...
This really is my latest find, available at the Salvation Military Thrift Store in Dallas Texas. Bought for .00 cash. It had been labeled ( AS-Isn't Working). Used to do A litt... Posted by William...