This circuit allows for the simultaneous display of four signals using a single channel of an oscilloscope. It sequentially switches each input to the output with some signal processing in between. It is designed for low-frequency signal measurements and does not include over-voltage protection at the inputs. Each input circuit is identical and utilizes one amplifier from a TL084 quad op-amp package. In channel 1, the input signal is attenuated by a factor of 10 using 100kΩ and 10kΩ resistors before reaching the non-inverting input of IC1a. A 15kΩ resistor in series with the op-amp output, along with a 10kΩ resistor to ground, provides additional attenuation. Vertical adjustment is made with VR2, which sets the amplifier's gain, allowing calibration or scaling of the displayed signal against the actual input voltage level. The gain can be adjusted from unity to approximately 26. The op-amp output must be limited to ±10V to ensure that the voltage into the 4-channel multiplexer (IC2) does not exceed ±5V. Thus, with a gain of unity, the input voltage can range from ±100V, while with a gain of 26, it should not exceed about ±3.85V. VR1 applies a positive or negative DC offset to the op-amp output, compensating for input offset voltage and allowing for vertical trace separation on the oscilloscope display. However, any offset will reduce the available output swing and limit measurement range. Each op-amp output connects to IC2, a 4-channel analog multiplexer, where the logic levels on "S0" and "S1" (pins 9 and 10) determine which input channel connects to the "Z" output (pin 3). A square wave oscillator and divider circuit toggle the "S0" and "S1" pins in sequence to select channels briefly. The oscillator is based on an LM6361 high-speed op-amp (IC6) operating at approximately 20kHz. Back-to-back zener diodes at the output clip the voltage to TTL levels, with diode D1 passing the positive half-cycle to the input of one gate of a 74HC00 quad NAND device. IC4a and IC4b clean up the signal before it is applied to the S0 input of IC2. A 74HC73 J-K flip-flop (IC5) divides the oscillator frequency by two, driving the "S1" input in 4-channel mode. In 2-channel mode (with switch S1 closed), one input (pin 12) of IC4d is pulled low, holding the "S1" input permanently low. A separate buffer circuit (IC3) provides a trigger signal for the oscilloscope, necessary for reliable triggering on the rapidly switching main output.
The circuit is structured around a robust design that facilitates the simultaneous observation of multiple signals without the need for multiple oscilloscope channels. Each input is processed through the TL084 op-amp, which is known for its low noise and high precision, making it ideal for sensitive signal measurements. The attenuation stage preceding the op-amp ensures that higher voltage signals are brought within the acceptable range for processing, thereby protecting the circuit from potential damage while maintaining signal integrity.
The gain adjustment feature provided by VR2 allows for precise calibration, ensuring that the displayed signal accurately reflects the input voltage levels. This is particularly useful in applications where signal amplitudes may vary significantly. The addition of a DC offset via VR1 enhances the versatility of the circuit, allowing users to manipulate the vertical positioning of the traces on the oscilloscope display for clearer differentiation.
The use of a 4-channel multiplexer (IC2) is a critical component in the design, enabling the selection of different signal paths based on the control signals generated by the oscillator circuit. The oscillator's frequency and the subsequent signal cleaning stages ensure that the multiplexer receives clean, well-defined signals, which are crucial for accurate representation on the oscilloscope.
The triggering mechanism is essential for synchronizing the oscilloscope display with the rapidly switching signals. By utilizing a dedicated buffer circuit, the design ensures that the oscilloscope can reliably capture and display the signals, even as they switch at high speeds. This thoughtful integration of components results in a sophisticated yet user-friendly circuit capable of handling a variety of low-frequency signal measurement tasks efficiently.This circuit enables you to display four signals simultaneously using only one channel of your oscilloscope. Essentially, it switches each of the inputs through to the output in turn, with some signal massaging in between.
Vertical (voltage axis) adjustment is made with VR2, which sets the gain of the amplifier. This is used to calibrate or scale the displayed signal against the actual input voltage level. Using the values shown, the gain can be adjusted from unity to about a factor of 26. Note that the output of the op amp must be limited to ± 10V so that the voltage into the 4-channel multiplexer (IC2) does not exceed ± 5V. Therefore, with a gain of unity, the input voltage can range from ± 100V, whereas with a gain of 26, it must not exceed about ± 3.
85V. VR1 applies a positive or negative DC offset to the output of the op amp. This can be used to compensate for op amp input offset voltage. It can also be used to shift the vertical position of the trace on-screen to provide multiple trace separation. Note, however, that any offset will consume part of the available output swing and therefore limit signal measurement "headroom".
Each op amp output is connected to IC2, a 4-channel analog multiplexer. The logic levels on "S0" & "S1" (pins 9 & 10) determine which input channel is connected to the "Z" output (pin 3). A square wave oscillator and divider circuit are used to toggle the "S0" and "S1" pins in sequence to first select channel 1 briefly, then channel 2 and so on.
An LM6361 high-speed op amp (IC6) forms the heart of the oscillator. It operates at about 20kHz. Back-to-back zener diodes at the output clip the voltage to TTL levels, after which diode D1 passes the positive half-cycle to the input of one gate of a 74HC00 quad NAND device. IC4a & IC4b "clean up" the signal before if is applied to the S0 input of IC2. A 74HC73 J-K flip-flip (IC5) divides the oscillator frequency by two. This is used to drive the "S1" input when in 4-channel mode. In 2-channel mode (switch S1 closed), one input (pin 12) of IC4d is pulled low, which effectively holds the "S1" input permanently low.
Finally, a separate buffer circuit (IC3) is used to provide a trigger signal for the oscilloscope. This is needed because it would be difficult to trigger reliably on the main output as it switches rapidly between the four signal sources. 🔗 External reference
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