Solid-State Windshield-Wiper Delay

In the wiper-delay schematic presented, when the ignition is activated, Di maintains a regulated +12 V DC. Upon closing SI, CI bypasses transients and allows this +12 V DC to reach the resistor divider R2-R3, generating a TTL high signal at pin 3 of IC1, a 4013 CMOS dual leading-edge triggered D-type flip-flop. The combination of filter R4 and capacitor C3 prevents IC1 from triggering incorrectly while the ignition is on. When SI is engaged, the output Q1 (pin 1) of IC1 latches high, activating Q1, which conducts through R5 to power IC2; LED1 indicates power status, while R6 regulates the current. Since IC2 relies on Q1 for power, it remains off until Q1 is activated. The left section of IC2 operates as an astable multivibrator, with its delay determined by resistors R7, R8, R11, and capacitor C4. The right section of IC2 functions as a monostable multivibrator, with its pulse duration controlled by R9 and C5. With the specified component values, R11 is expected to adjust the delay between approximately 15 to 84 seconds, with a 2.42-second monostable pulse activating the wiper blades during each cycle. However, the actual delay is anticipated to be between 2 to 18 seconds, with a 1-second monostable pulse per cycle. This variation arises because IC2 is powered from the emitter of Q1 instead of directly from the regulated +12 V supply. Transistor Q1 serves as an active current source, charging and discharging C4 more rapidly than it would under normal conditions. The output from the astable multivibrator (OUT1, pin 5) is connected to TRIG2 (pin 8). When OUT2 (pin 9) goes high, Q2 is turned on through R10, allowing current to flow through RY1, while diode D2 dissipates back EMF when RY1 is deactivated.

The wiper-delay circuit is designed to provide a timed operation of windshield wipers based on the ignition state and user input. The 4013 CMOS flip-flop (IC1) is crucial for maintaining the state of the wiper control signal, ensuring that the wipers only operate when intended. The resistor divider R2-R3 is essential for generating the TTL signal required to trigger the flip-flop, while the filtering components (R4 and C3) protect against false triggering due to electrical noise.

The astable configuration of IC2 generates a square wave output that determines the timing for the wiper operation, with the resistors R7, R8, and R11 setting the frequency and thus the delay between wiper cycles. The monostable section, controlled by R9 and C5, ensures that each wiper activation lasts for a predetermined duration, allowing for effective clearing of the windshield. The interaction between Q1 and IC2 is particularly noteworthy, as it modifies the expected timing characteristics due to the active current sourcing from Q1, leading to faster charge and discharge cycles for C4.

The inclusion of Q2 and RY1 allows for the actual control of the wiper motor or mechanism, with D2 providing protection against voltage spikes that could occur when the relay is turned off, thereby ensuring the longevity and reliability of the circuit. Overall, this schematic represents a robust solution for controlling windshield wipers with adjustable timing features, enhancing driver convenience and safety. In the wiper-delay schematic shown, with the ignition on, Dl maintains regulated +12 Vdc. When SI closes , CI bypasses transients and passes this +12 Vdc to divider R2-R3, producing a TTL high at pin 3 of IC1, a 4013 CMOS dual leading-edge triggered D-type flip-flop. Filter R4/C3 keeps IC1 from triggering erroneously when the ignition is on. When SI is pressed, output Ql (pin 1) of IC1 latches high, turning on Ql, which conducts via R5, turning on IC2; LED1 indicates power, and R6 sets the current.

Because IC2 depends on Ql for power, IC2 stays off until Ql turns on. The left half of IC2 is an astable, with its delay set by R7, R8, Rll, and C4. The right half of IC2 is a monostable, with its pulse duration set by R9 and C5. With the values used, you might expect Rll to vary the delay from about 15 to 84 seconds, with a 2.42-second monostable pulse operating the wiper blades on each cycle. However, the actual delay will range between 2 to 18 s, with a 1-s monostable pulse on each cycle. That discrepancy stems from the fact that IC2 is being fed from the emitter of Ql, rather than directly from the regulated +12-V supply.

Transistor Ql acts as an active current source, charges and discharges C4 faster than it ordinarily would. The astable output (OUTi, pin 5) is tied to TRIG2 (pin 8). When OUT2 (pin 9) becomes high, Q2 is biased via RIO and current flows through RY1, with D2 dissipating back-emf when RY1 shuts off.

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