The dual slope-sampling solar engine. Yet another interesting design from the fertile mind of Wilf Rigter If you had time to experiment with the ALF type SE circuit you may have discovered some of its shortcomings with regard to a Power Smart Head adaptation. The problem is that HCMOS gates are power hungry when used as SE voltage comparators when the analog input voltage is near the CMOS switching threshold. If an HCMOS gate is used without sampling, the chip supply current can be as high as 70mA with the comparator input voltage near the trigger threshold (Vcc / 2).

The sensors used are silicon phototransistors and Cadmium Sulfide (CdS) photocells. Both of these sensors allow less current to flow when they are dark than when lighted. Phototransistors change their conductance while photocells change their resistance depending on the intensity of the light falling on them. All of the detectors on this page use LM339 Quad or LM393 dual voltage comparator integrated circuits to detect the change in voltage across the sensor. For information on Voltage Comparators please see the Voltage Comparator Information page at this site.

The circuit on this page is for a simple light detector circuit board that has 8 detectors that can be used with visible or infrared light systems. The detectors use LM339 voltage comparators as the active element. Phototransistors or CdS photocells can be used as sensors for this circuit. If phototransistors are used the circuits can also be used as infrared light detectors. These detectors can be used as part of other light detector circuits shown on other pages at this site such as these Light Activated Detector Circuits at this site.

This circuit is intended to indicate the power output level of any audio amplifier. It is simple, portable, and displays three power levels that can be set to any desired value. IC1A is the input buffer, feeding 3 voltage comparators and LEDs drivers by means of a variable dc voltage obtained by R5 and C4 smoothing action. The simplest way to connect this circuit to the amplifier output is to use a twisted pair cable terminated with two insulated crocodile clips.

The approaches using on-chip A-to-D converters on AVR, PIC, and Cypress controllers reached sample rates of up to about 60 kHz. Not really very useful for the sort of thing I was thinking about using this for: encoded data, radio control signals, A-to-D converter waveforms, checking the dynamic range of amplifiers and capturing audio waveforms for filtering and power calculations. I realized that the comparators in AVR devices were pretty fast with a response time of several hundred nanoseconds, and that the PWM (pulse width modulation) circuit could be made fairly responsive. If there was just some way to combine these to sample analog values quickly...

Sawtooth wave generators using opamp are very common. But the disadvantage is that it requires a bipolar power supply. A sawtooth wave generator can be built using a simple 555 timer IC and a transistor as shown in the circuit diagram. The working of the circuit can be explained as follows: The part of the circuit consisting of the capacitor C, transistor,zener diode and the resistors form a constant current source to charge the capacitor. Initially assume the capacitor is fully discharged. The voltage across it is zero and hence the internal comparators inside the 555 connected to pin 2 causes the 555's output to go high and the internal transistor of 555 shorting the capacitor C to ground opens and the capacitor starts charging to the supply voltage.

This over/under voltage cut-out will save your costly electrical and electronic appliances from the adverse effects of very high and very low mains voltages. The circuit features auto reset and utilises easily available components. It makes use of the comparators available inside 555 timer ICs. Supply is tapped from different points of the power supply circuit for relay and control circuit operation to achieve reliability. The circuit utilises comparator 2 for control while comparator 1 output (connected to reset pin R) is kept low by shorting pins 5 and 6 of 555 IC. The positive input pin of comparator 2 is at 1/3rd of Vcc voltage . Thus as long as negative input pin 2 is less positive than 1/3 Vcc, comparator 2 output is high and the internal flip-flop is set, i.e. its Q output (pin 3) is high. At the same time pin 7 is in high impedance state and LED connected to pin 7 is therefore off.

This circuit is a real core of the dimmer system. This circuit generates ramp 100 Hz signal which is syncronized to the incoming mains voltage. The ramp signal which is generated will start form 10V and go linearly down to 0V in 10 milliseconds. At the next mains voltage zero crossing the ramp signal will again immediatly start from 10V and go down to 0V. This same ramp signal is fed to all of the 4 comparators in the dimmer. The following ramp signal generator is quite simple ramp generator based on discrete transistors which do some switching, capacitor and a constant current source made by using one transistor.

In the circuit below, a quad voltage comparator (LM339) is used as a simple bar graph meter to indicate the charge condition of a 12 volt, lead acid battery. A 5 volt reference voltage is connected to each of the (+) inputs of the four comparators and the (-) inputs are connected to successive points along a voltage divider. The LEDs will illuminate when the voltage at the negative (-) input exceeds the reference voltage. Calibration can be done by adjusting the 2K potentiometer so that all four LEDs illuminate when the battery voltage is 12.7 volts, indicating full charge with no load on the battery.

In this circuit a LM339 quad voltage comparator is used to generate a time delay and control a high current output at low voltage. Approximatey 5 amps of current can be obtained using a couple fresh alkaline D batteries. Three of the comparators are wired in parallel to drive a medium power PNP transistor (2N2905 or similar) which in turn drives a high current NPN transistor (TIP35 or similar). The 4th comparator is used to generate a time delay after the normally closed switch is opened.

The circuit below responds to sound pressure levels from about 60 to 70 dB. The sound is picked up by an 8 ohm speaker, amplified by a transistor stage and one LM324 op-amp section. You can also use a dynamic microphone but I found the speaker was more sensitive. The remaining 3 sections of the LM324 quad op-amp are used as voltage comparators and drive 3 indicator LEDs or incandescents which are spaced about 3dB apart. An additional transistor is needed for incandescent lights as shown with the lower lamp. I used 12 volt, 50mA lamps.

The circuit uses CA3290 BiMOS dual voltage comparators. Non-inverting inputs of A1 and A2 are tied to voltage divider reference. The input signal is applied to the inverting inputs.

A quad op amp can simultaneously generate four synchronized waveforms. The two comparators (Al and A3) produce square and pulse waves, while the tWo integrators (A2 and A4) give triangular and sawtooth waves.

The positive and negative peak amplitude is controllable to an accuracy of about ± 0.01 V by a dc input. Also, the output frequency and symmetry are easily adjustable. The oscillator consists of an integrator and two comparators—one comparator sets the positive peak and the other the negative peak of the triangle wave. If R1 is replaced by a potentiometer, the frequency can be varied over at least a 10 to 1 range without affecting amplitude. Symmetry is also adjustable by connecting a 50 kfi resistor from the inverting input of the LM118 to the arm of the 1 kO potentiometer.

Ul (a 4046 PLL containing a voltage controlled oscillator or VCO, two phase comparators, a source follower, and a Zener diode) is used to produce a low-frequency, pulsed output of about 40 Hz. The VCO's frequency range is determined by R6 and C2, which can be altered by varying the voltage at pin 9. The rising voltage causes the frequency to rise from zero to threshold and remain at that frequency as long as SI is closed. When SI is opened, Cl discharges slowly through Rl to ground and the voltage falls toward zero. That produces a decreasing pulse rate. The output of Ul at pin 4 is connected to the clock input of U2 (a 4017 decade decoder/driver) at pin 14 via C3.

This circuit gives an output (which in this case is OV) when an input voltage lies in between two specified voltages. When it is outside this window, the output is positive. The two op amps are used as voltage comparators. When Vin is more positive than Vref (upper) the output of ICl is positive and D1 is forward biased. Otherwise the output is negative, D1 reverse biased and hence Vout is OV. Similarly, when Vin is more negative than Vref (lower), the output of IC2 is positive; D2 is forward biased and this Vout is positive

The analog input is fed into the span resistor of a DAC. The analog input voltage range is selectable in the same way as the output voltage range of the DAC. The net current flow through the ladder termination resistance; i.e., 2 KO for HI-562A; produces an error voltage at the DAC output. This error voltage is compared with 1/z LSB by a comparator. When the error voltage is within ±1/z LSB range, the Q output of the comparators are both low, which stops the counter and gives a data ready signal to indicate that the digital output is correct.

A window detector is a specialized comparator circuit designed to detect the presence of a voltage between two prescribed limits; that is, within a voltage window. This circuit is implemented by logically combining the outputs of two single-ended comparators by the IN914 diodes. When the input voltage is between the upper limit, VuL. and the lower limit, VLL, the output voltage is zero; otherwise it equals a logic high level. The output of this circuit can be used to drive a logic gate, LED driver, or relay driver circuit.

The primary advantage of this circuit, when compared to other comparators, is its ability to latch after the input has reached a predetermined threshold level. When the input exceeds the threshold level, the LM311N output increases. This transition enables the strobe input, preventing the output from falling low. A high-level voltage on the reset input will tum off Q1, thereby removing the supply voltage from the open collector output of the LM311N.

This matrix can show the values of two variables, for example, frequency and voltage. The display is a graph made from a matrix of LEDs. The LEDs on each axis are color coded, red for out of tolerance and green for in, fanning a red band around the inner green rectangle. The two input voltages proportional to the functions being measured are presented to the two columns of comparators. The other comparator input is a reference voltage derived from resistor ladder Rl to Rx. The output of each row of comparators is processed with an inverted and an AND gate to allow only one active output for any input value.